Project Information c:\max2work\kumagai\univ_if\uiftest\uif_apci54.rpt MAX+plus II Compiler Report File Version 10.1 06/12/2001 Compiled: 08/28/2002 19:25:16 Copyright (C) 1988-2001 Altera Corporation Any megafunction design, and related net list (encrypted or decrypted), support information, device programming or simulation file, and any other associated documentation or information provided by Altera or a partner under Altera's Megafunction Partnership Program may be used only to program PLD devices (but not masked PLD devices) from Altera. Any other use of such megafunction design, net list, support information, device programming or simulation file, or any other related documentation or information is prohibited for any other purpose, including, but not limited to modification, reverse engineering, de-compiling, or use with any other silicon devices, unless such use is explicitly licensed under a separate agreement with Altera or a megafunction partner. Title to the intellectual property, including patents, copyrights, trademarks, trade secrets, or maskworks, embodied in any such megafunction design, net list, support information, device programming or simulation file, or any other related documentation or information provided by Altera or a megafunction partner, remains with Altera, the megafunction partner, or their respective licensors. No other licenses, including any licenses needed under any third party's intellectual property, are provided herein. ***** Project compilation was successful ** DEVICE SUMMARY ** Chip/ Input Output Bidir LCs POF Device Pins Pins Pins LCs % Utilized uif_apci54 EPF6024AQC208-3 42 20 65 121 6 % User Pins: 42 20 65 Project Information c:\max2work\kumagai\univ_if\uiftest\uif_apci54.rpt ** PROJECT COMPILATION MESSAGES ** Warning: TRI or OPNDRN buffer ':98' is permanently disabled Warning: TRI or OPNDRN buffer ':98' is permanently disabled Info: Reserved unused input pin 'TA16' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin 'TA15' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin 'TA14' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin 'TA13' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin 'TA12' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin 'TA11' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin 'TA10' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin 'TA9' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin 'TA8' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin '/IOCS7' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin '/IOCS6' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin '/IOCS5' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin '/IOCS4' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin '/IOCS3' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin '/IOCS1' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin '/IOCS0' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin '/IOR' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin '/MWR' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin '/MRD' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin '/ROMCS' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin '/MEMCS' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin '/IORACK' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin '/IRC3' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin '/IRC2' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin '/IRC1' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin '/IRC0' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin '/TRESET' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin '/TOUT' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin 'ExtClock0' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Info: Reserved unused input pin 'ExtClock1' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board Project Information c:\max2work\kumagai\univ_if\uiftest\uif_apci54.rpt ** PIN/LOCATION/CHIP ASSIGNMENTS ** Actual User Assignments Assignments (if different) Node Name uif_apci54@28 BCLK uif_apci54@197 /BHE uif_apci54@128 ExtClock0 uif_apci54@132 ExtClock1 uif_apci54@127 ExtIO0 uif_apci54@133 ExtIO1 uif_apci54@145 IOA_DIR uif_apci54@146 IOA_EN uif_apci54@143 IOA0 uif_apci54@142 IOA1 uif_apci54@141 IOA2 uif_apci54@139 IOA3 uif_apci54@138 IOA4 uif_apci54@137 IOA5 uif_apci54@136 IOA6 uif_apci54@134 IOA7 uif_apci54@125 IOB_DIR uif_apci54@126 IOB_EN uif_apci54@123 IOB0 uif_apci54@122 IOB1 uif_apci54@121 IOB2 uif_apci54@120 IOB3 uif_apci54@119 IOB4 uif_apci54@118 IOB5 uif_apci54@117 IOB6 uif_apci54@116 IOB7 uif_apci54@108 IOC_DIR uif_apci54@109 IOC_EN uif_apci54@155 /IOCS0 uif_apci54@156 /IOCS1 uif_apci54@157 /IOCS2 uif_apci54@158 /IOCS3 uif_apci54@160 /IOCS4 uif_apci54@161 /IOCS5 uif_apci54@163 /IOCS6 uif_apci54@164 /IOCS7 uif_apci54@106 IOC0 uif_apci54@105 IOC1 uif_apci54@104 IOC2 uif_apci54@103 IOC3 uif_apci54@101 IOC4 uif_apci54@100 IOC5 uif_apci54@99 IOC6 uif_apci54@98 IOC7 uif_apci54@92 IOD_DIR uif_apci54@93 IOD_EN uif_apci54@90 IOD0 uif_apci54@89 IOD1 uif_apci54@88 IOD2 uif_apci54@87 IOD3 uif_apci54@86 IOD4 uif_apci54@85 IOD5 uif_apci54@84 IOD6 uif_apci54@83 IOD7 uif_apci54@72 IOE_DIR uif_apci54@73 IOE_EN uif_apci54@71 IOE0 uif_apci54@70 IOE1 uif_apci54@69 IOE2 uif_apci54@68 IOE3 uif_apci54@67 IOE4 uif_apci54@66 IOE5 uif_apci54@65 IOE6 uif_apci54@64 IOE7 uif_apci54@60 IOF_DIR uif_apci54@61 IOF_EN uif_apci54@59 IOF0 uif_apci54@58 IOF1 uif_apci54@57 IOF2 uif_apci54@56 IOF3 uif_apci54@55 IOF4 uif_apci54@54 IOF5 uif_apci54@53 IOF6 uif_apci54@52 IOF7 uif_apci54@29 /IOR uif_apci54@33 /IORACK uif_apci54@31 IORDY uif_apci54@32 /IORREQ uif_apci54@30 /IOW uif_apci54@39 /IRC0 uif_apci54@40 /IRC1 uif_apci54@41 /IRC2 uif_apci54@42 /IRC3 uif_apci54@34 IRQ0 uif_apci54@35 IRQ1 uif_apci54@36 IRQ2 uif_apci54@37 IRQ3 uif_apci54@20 /MEMCS uif_apci54@22 /MRD uif_apci54@23 /MWR uif_apci54@21 /ROMCS uif_apci54@196 TA0 uif_apci54@195 TA1 uif_apci54@194 TA2 uif_apci54@193 TA3 uif_apci54@192 TA4 uif_apci54@191 TA5 uif_apci54@190 TA6 uif_apci54@189 TA7 uif_apci54@188 TA8 uif_apci54@177 TA9 uif_apci54@176 TA10 uif_apci54@175 TA11 uif_apci54@173 TA12 uif_apci54@172 TA13 uif_apci54@171 TA14 uif_apci54@170 TA15 uif_apci54@168 TA16 uif_apci54@48 TCLK uif_apci54@203 TD0 uif_apci54@204 TD1 uif_apci54@205 TD2 uif_apci54@206 TD3 uif_apci54@207 TD4 uif_apci54@208 TD5 uif_apci54@1 TD6 uif_apci54@2 TD7 uif_apci54@3 TD8 uif_apci54@4 TD9 uif_apci54@11 TD10 uif_apci54@12 TD11 uif_apci54@13 TD12 uif_apci54@14 TD13 uif_apci54@15 TD14 uif_apci54@16 TD15 uif_apci54@49 /TOUT uif_apci54@24 /TRESET Project Information c:\max2work\kumagai\univ_if\uiftest\uif_apci54.rpt ** FILE HIERARCHY ** |lpm_bustri:45| |apci54_io:244| |apci54_io:244|lpm_bustri:10| |apci54_io:249| |apci54_io:249|lpm_bustri:10| |apci54_io:248| |apci54_io:248|lpm_bustri:10| |apci54_io:247| |apci54_io:247|lpm_bustri:10| |apci54_io:246| |apci54_io:246|lpm_bustri:10| |apci54_io:245| |apci54_io:245|lpm_bustri:10| |lpm_mux:250| |lpm_mux:250|altshift:external_latency_ffs| |lpm_mux:250|muxlut:150| |lpm_mux:250|muxlut:168| |lpm_mux:250|muxlut:186| |lpm_mux:250|muxlut:204| |lpm_mux:250|muxlut:222| |lpm_mux:250|muxlut:240| |lpm_mux:250|muxlut:258| |lpm_mux:250|muxlut:276| |lpm_mux:250|muxlut:294| |lpm_mux:250|muxlut:312| |lpm_mux:250|muxlut:330| |lpm_mux:250|muxlut:348| |lpm_mux:250|muxlut:366| |lpm_mux:250|muxlut:384| |lpm_mux:250|muxlut:402| |lpm_mux:250|muxlut:420| |lpm_compare:256| |lpm_compare:256|comptree:comparator| |lpm_compare:256|comptree:comparator|cmpchain:cmp_end| |lpm_compare:256|altshift:aeb_ext_lat_ffs| |lpm_compare:256|altshift:agb_ext_lat_ffs| |lpm_constant:258| |lpm_decode:259| |lpm_decode:259|altshift:external_latency_ffs| |lpm_decode:259|lpm_compare:comparator3| |lpm_decode:259|lpm_compare:comparator3|comptree:comparator| |lpm_decode:259|lpm_compare:comparator3|comptree:comparator|cmpchain:cmp_end| |lpm_decode:259|lpm_compare:comparator3|altshift:aeb_ext_lat_ffs| |lpm_decode:259|lpm_compare:comparator3|altshift:agb_ext_lat_ffs| |lpm_decode:259|lpm_compare:comparator2| |lpm_decode:259|lpm_compare:comparator2|comptree:comparator| |lpm_decode:259|lpm_compare:comparator2|comptree:comparator|cmpchain:cmp_end| |lpm_decode:259|lpm_compare:comparator2|altshift:aeb_ext_lat_ffs| |lpm_decode:259|lpm_compare:comparator2|altshift:agb_ext_lat_ffs| |lpm_decode:259|lpm_compare:comparator1| |lpm_decode:259|lpm_compare:comparator1|comptree:comparator| |lpm_decode:259|lpm_compare:comparator1|comptree:comparator|cmpchain:cmp_end| |lpm_decode:259|lpm_compare:comparator1|altshift:aeb_ext_lat_ffs| |lpm_decode:259|lpm_compare:comparator1|altshift:agb_ext_lat_ffs| |lpm_decode:259|lpm_compare:comparator0| |lpm_decode:259|lpm_compare:comparator0|comptree:comparator| |lpm_decode:259|lpm_compare:comparator0|comptree:comparator|cmpchain:cmp_end| |lpm_decode:259|lpm_compare:comparator0|altshift:aeb_ext_lat_ffs| |lpm_decode:259|lpm_compare:comparator0|altshift:agb_ext_lat_ffs| |lpm_decode:259|lpm_constant:131| |lpm_decode:259|lpm_constant:136| |lpm_decode:259|lpm_constant:141| |lpm_decode:259|lpm_constant:146| |lpm_decode:262| |lpm_decode:262|altshift:external_latency_ffs| |lpm_decode:262|lpm_compare:comparator3| |lpm_decode:262|lpm_compare:comparator3|comptree:comparator| |lpm_decode:262|lpm_compare:comparator3|comptree:comparator|cmpchain:cmp_end| |lpm_decode:262|lpm_compare:comparator3|altshift:aeb_ext_lat_ffs| |lpm_decode:262|lpm_compare:comparator3|altshift:agb_ext_lat_ffs| |lpm_decode:262|lpm_compare:comparator2| |lpm_decode:262|lpm_compare:comparator2|comptree:comparator| |lpm_decode:262|lpm_compare:comparator2|comptree:comparator|cmpchain:cmp_end| |lpm_decode:262|lpm_compare:comparator2|altshift:aeb_ext_lat_ffs| |lpm_decode:262|lpm_compare:comparator2|altshift:agb_ext_lat_ffs| |lpm_decode:262|lpm_compare:comparator1| |lpm_decode:262|lpm_compare:comparator1|comptree:comparator| |lpm_decode:262|lpm_compare:comparator1|comptree:comparator|cmpchain:cmp_end| |lpm_decode:262|lpm_compare:comparator1|altshift:aeb_ext_lat_ffs| |lpm_decode:262|lpm_compare:comparator1|altshift:agb_ext_lat_ffs| |lpm_decode:262|lpm_compare:comparator0| |lpm_decode:262|lpm_compare:comparator0|comptree:comparator| |lpm_decode:262|lpm_compare:comparator0|comptree:comparator|cmpchain:cmp_end| |lpm_decode:262|lpm_compare:comparator0|altshift:aeb_ext_lat_ffs| |lpm_decode:262|lpm_compare:comparator0|altshift:agb_ext_lat_ffs| |lpm_decode:262|lpm_constant:131| |lpm_decode:262|lpm_constant:136| |lpm_decode:262|lpm_constant:141| |lpm_decode:262|lpm_constant:146| |bnand5:263| Device-Specific Information:c:\max2work\kumagai\univ_if\uiftest\uif_apci54.rpt uif_apci54 ***** Logic for device 'uif_apci54' compiled without errors. Device: EPF6024AQC208-3 FLEX 6000 Configuration Scheme: Passive Serial Device Options: User-Supplied Start-Up Clock = OFF Auto-Restart Configuration on Frame Error = OFF Release Clears Before Tri-States = OFF Enable Chip_Wide Reset = OFF Enable Chip-Wide Output Enable = OFF Enable INIT_DONE Output = ON Enable JTAG Support = OFF MultiVolt I/O = OFF R R R R R R R R R R R R R R E E E E E E E E E E E E E E S S S S S S ^ S S S S S S / / S / / S / / E E V E E E E ^ V D E E E E E E V I I E I I E I I R R C R / R R R D C A R R R T T R T T T T R T R C O O R O O R O O T T T T T T V V C G V B T T T T T T T T T V V V C C G T V V V T A A V A A A A V A V C G C C V C C V C C D D D D D D E E I N E H A A A A A A A A A E E E L I N A E E E A 1 1 E 1 1 1 1 E 1 E I N S S E S S E S S 5 4 3 2 1 0 D D O D D E 0 1 2 3 4 5 6 7 8 D D D K O D 0 D D D 9 0 1 D 2 3 4 5 D 6 D O D 7 6 D 5 4 D 3 2 ----------------------------------------------------------------------------------------------------------_ / 208 206 204 202 200 198 196 194 192 190 188 186 184 182 180 178 176 174 172 170 168 166 164 162 160 158 |_ / 207 205 203 201 199 197 195 193 191 189 187 185 183 181 179 177 175 173 171 169 167 165 163 161 159 157 | TD6 | 1 156 | /IOCS1 TD7 | 2 155 | /IOCS0 TD8 | 3 154 | RESERVED TD9 | 4 153 | RESERVED RESERVED | 5 152 | RESERVED ^nCE | 6 151 | RESERVED GND | 7 150 | ^CONF_DONE VCCINT | 8 149 | VCCIO VCCIO | 9 148 | VCCINT RESERVED | 10 147 | GND TD10 | 11 146 | IOA_EN TD11 | 12 145 | IOA_DIR TD12 | 13 144 | RESERVED TD13 | 14 143 | IOA0 TD14 | 15 142 | IOA1 TD15 | 16 141 | IOA2 RESERVED | 17 140 | RESERVED RESERVED | 18 139 | IOA3 RESERVED | 19 138 | IOA4 /MEMCS | 20 137 | IOA5 /ROMCS | 21 136 | IOA6 /MRD | 22 135 | @INIT_DONE /MWR | 23 134 | IOA7 /TRESET | 24 133 | ExtIO1 GND | 25 132 | ExtClock1 VCCINT | 26 131 | VCCIO VCCIO | 27 EPF6024AQC208-3 130 | VCCINT BCLK | 28 129 | GND /IOR | 29 128 | ExtClock0 /IOW | 30 127 | ExtIO0 IORDY | 31 126 | IOB_EN /IORREQ | 32 125 | IOB_DIR /IORACK | 33 124 | RESERVED IRQ0 | 34 123 | IOB0 IRQ1 | 35 122 | IOB1 IRQ2 | 36 121 | IOB2 IRQ3 | 37 120 | IOB3 RESERVED | 38 119 | IOB4 /IRC0 | 39 118 | IOB5 /IRC1 | 40 117 | IOB6 /IRC2 | 41 116 | IOB7 /IRC3 | 42 115 | RESERVED GND | 43 114 | RESERVED VCCINT | 44 113 | RESERVED VCCIO | 45 112 | VCCIO ^MSEL | 46 111 | VCCINT RESERVED | 47 110 | GND TCLK | 48 109 | IOC_EN /TOUT | 49 108 | IOC_DIR RESERVED | 50 107 | RESERVED RESERVED | 51 106 | IOC0 IOF7 | 52 105 | IOC1 | 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 _| \ 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 | \----------------------------------------------------------------------------------------------------------- I I I I I I I I I G V I I I I I I I I I I R R R ^ G V ^ R R I I I I I I I I R I I R G V R I I I I R I I O O O O O O O O O N C O O O O O O O O O O E E E n N C n E E O O O O O O O O E O O E N C E O O O O E O O F F F F F F F F F D C E E E E E E E E E E S S S C D C S S S D D D D D D D D S D D S D C S C C C C S C C 6 5 4 3 2 1 0 _ _ I 7 6 5 4 3 2 1 0 _ _ E E E O I T E E 7 6 5 4 3 2 1 0 E _ _ E I E 7 6 5 4 E 3 2 D E O D E R R R N O A R R R D E R O R R I N I N V V V F T V V V I N V V V R R E E E I U E E E R E E E D D D G S D D D D D D N.C. = No Connect. This pin has no internal connection to the device. VCCINT = Dedicated power pin, which MUST be connected to VCC (3.3 volts). VCCIO = Dedicated power pin, which MUST be connected to VCC (3.3 volts). GND = Dedicated ground pin or unused dedicated input, which MUST be connected to GND. RESERVED = Unused I/O pin, which MUST be left unconnected. ^ = Dedicated configuration pin. + = Reserved configuration pin, which is tri-stated during user mode. * = Reserved configuration pin, which drives out in user mode. PDn = Power Down pin. @ = Special-purpose pin. # = JTAG Boundary-Scan Testing/In-System Programming or Configuration Pin. The JTAG inputs TMS and TDI should be tied to VCC and TCK should be tied to GND when not in use. & = JTAG pin used for I/O. When used as user I/O, JTAG pins must be kept stable before and during configuration. JTAG pin stability prevents accidental loading of JTAG instructions. Device-Specific Information:c:\max2work\kumagai\univ_if\uiftest\uif_apci54.rpt uif_apci54 ** RESOURCE USAGE ** Logic Column Row Array Interconnect Interconnect Sync. Sync. Left External Right External Borrowed LC1 Block Logic Cells Driven Driven Clocks Clears Clear Load Interconnect Interconnect Inputs A5 8/10( 80%) 4/10( 40%) 0/10( 0%) 1/2 0/2 0/1 0/1 7/22( 31%) 6/22( 27%) 0/4 A12 6/10( 60%) 4/10( 40%) 0/10( 0%) 1/2 0/2 0/1 0/1 6/22( 27%) 5/22( 22%) 0/4 A13 1/10( 10%) 1/10( 10%) 0/10( 0%) 1/2 0/2 0/1 0/1 0/22( 0%) 2/22( 9%) 0/4 A14 1/10( 10%) 1/10( 10%) 0/10( 0%) 1/2 0/2 0/1 0/1 2/22( 9%) 1/22( 4%) 0/4 A15 6/10( 60%) 3/10( 30%) 0/10( 0%) 0/2 0/2 0/1 0/1 6/22( 27%) 8/22( 36%) 0/4 A23 1/10( 10%) 1/10( 10%) 0/10( 0%) 0/2 0/2 0/1 0/1 1/22( 4%) 0/22( 0%) 0/4 B3 2/10( 20%) 1/10( 10%) 0/10( 0%) 0/2 0/2 0/1 0/1 2/22( 9%) 3/22( 13%) 0/4 B6 2/10( 20%) 0/10( 0%) 0/10( 0%) 1/2 0/2 0/1 0/1 1/22( 4%) 2/22( 9%) 0/4 B14 8/10( 80%) 1/10( 10%) 0/10( 0%) 1/2 0/2 0/1 0/1 5/22( 22%) 5/22( 22%) 0/4 B16 2/10( 20%) 2/10( 20%) 0/10( 0%) 1/2 0/2 0/1 0/1 1/22( 4%) 2/22( 9%) 0/4 B18 1/10( 10%) 0/10( 0%) 0/10( 0%) 0/2 0/2 0/1 0/1 0/22( 0%) 1/22( 4%) 0/4 B25 1/10( 10%) 1/10( 10%) 0/10( 0%) 0/2 0/2 0/1 0/1 0/22( 0%) 2/22( 9%) 0/4 B28 8/10( 80%) 4/10( 40%) 0/10( 0%) 0/2 0/2 0/1 0/1 8/22( 36%) 7/22( 31%) 0/4 C4 3/10( 30%) 2/10( 20%) 0/10( 0%) 1/2 0/2 0/1 0/1 1/22( 4%) 4/22( 18%) 0/4 C9 2/10( 20%) 1/10( 10%) 0/10( 0%) 0/2 0/2 0/1 0/1 2/22( 9%) 3/22( 13%) 0/4 C13 10/10(100%) 10/10(100%) 0/10( 0%) 1/2 0/2 0/1 0/1 3/22( 13%) 4/22( 18%) 0/4 C22 6/10( 60%) 3/10( 30%) 0/10( 0%) 0/2 0/2 0/1 0/1 6/22( 27%) 6/22( 27%) 0/4 D1 7/10( 70%) 4/10( 40%) 0/10( 0%) 0/2 0/2 0/1 0/1 4/22( 18%) 6/22( 27%) 0/4 D3 4/10( 40%) 4/10( 40%) 0/10( 0%) 1/2 0/2 0/1 0/1 1/22( 4%) 4/22( 18%) 0/4 D5 1/10( 10%) 1/10( 10%) 0/10( 0%) 0/2 0/2 0/1 0/1 1/22( 4%) 2/22( 9%) 0/4 D11 1/10( 10%) 1/10( 10%) 0/10( 0%) 0/2 0/2 0/1 0/1 1/22( 4%) 2/22( 9%) 0/4 D13 1/10( 10%) 1/10( 10%) 0/10( 0%) 1/2 0/2 0/1 0/1 0/22( 0%) 2/22( 9%) 0/4 D24 2/10( 20%) 2/10( 20%) 0/10( 0%) 0/2 0/2 0/1 0/1 1/22( 4%) 2/22( 9%) 0/4 D28 2/10( 20%) 1/10( 10%) 0/10( 0%) 0/2 0/2 0/1 0/1 0/22( 0%) 2/22( 9%) 0/4 E1 4/10( 40%) 4/10( 40%) 0/10( 0%) 1/2 0/2 0/1 0/1 2/22( 9%) 3/22( 13%) 0/4 E23 7/10( 70%) 7/10( 70%) 0/10( 0%) 1/2 0/2 0/1 0/1 2/22( 9%) 4/22( 18%) 0/4 E25 6/10( 60%) 6/10( 60%) 0/10( 0%) 1/2 0/2 0/1 0/1 2/22( 9%) 3/22( 13%) 0/4 F16 1/10( 10%) 1/10( 10%) 0/10( 0%) 1/2 0/2 0/1 0/1 0/22( 0%) 2/22( 9%) 0/4 F28 2/10( 20%) 1/10( 10%) 0/10( 0%) 0/2 0/2 0/1 0/1 0/22( 0%) 2/22( 9%) 0/4 G4 10/10(100%) 10/10(100%) 0/10( 0%) 1/2 0/2 0/1 0/1 7/22( 31%) 5/22( 22%) 0/4 G13 3/10( 30%) 0/10( 0%) 0/10( 0%) 0/2 0/2 0/1 0/1 1/22( 4%) 2/22( 9%) 0/4 G18 2/10( 20%) 0/10( 0%) 0/10( 0%) 0/2 0/2 0/1 0/1 0/22( 0%) 2/22( 9%) 0/4 Total dedicated input pins used: 4/4 (100%) Total I/O pins used: 124/167 ( 74%) Total logic cells used: 121/1960 ( 6%) Average fan-in: 3.11/4 ( 77%) Total fan-in: 377/7840 ( 4%) Total input pins required: 42 Total output pins required: 20 Total bidirectional pins required: 65 Total reserved pins required 1 Total logic cells required: 121 Total flipflops required: 64 Total packed registers required: 0 Total logic cells in carry chains: 0 Total number of carry chains: 0 Total logic cells in cascade chains: 34 Total number of cascade chains: 17 Logic cells inserted for fitting: 1 Synthesized logic cells: 8/1960 ( 0%) Logic Cell Counts Column: 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Total A: 0 0 0 0 8 0 0 0 0 0 0 6 1 1 6 0 0 0 0 0 0 0 1 0 0 0 0 0 23 B: 0 0 2 0 0 2 0 0 0 0 0 0 0 8 0 2 0 1 0 0 0 0 0 0 1 0 0 8 24 C: 0 0 0 3 0 0 0 0 2 0 0 0 10 0 0 0 0 0 0 0 0 6 0 0 0 0 0 0 21 D: 7 0 4 0 1 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 2 0 0 0 2 18 E: 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 7 0 6 0 0 0 17 F: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 2 3 G: 0 0 0 10 0 0 0 0 0 0 0 0 3 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 15 Total: 11 0 6 13 9 2 0 0 2 0 1 6 15 9 6 3 0 3 0 0 0 6 8 2 7 0 0 12 121 Device-Specific Information:c:\max2work\kumagai\univ_if\uiftest\uif_apci54.rpt uif_apci54 ** INPUTS ** Fan-In Fan-Out Pin LC Row Col Primitive Code INP FBK OUT FBK Name 28 - - -- INPUT G 0 0 0 0 BCLK 197 - - 06 INPUT 0 0 0 1 /BHE 128 - - -- INPUT 0 0 0 0 ExtClock0 132 - - -- INPUT 0 0 0 0 ExtClock1 143 - B -- BIDIR 0 1 0 1 IOA0 142 - C -- BIDIR 0 1 0 1 IOA1 141 - C -- BIDIR 0 1 0 1 IOA2 139 - C -- BIDIR 0 1 0 1 IOA3 138 - C -- BIDIR 0 1 0 1 IOA4 137 - C -- BIDIR 0 1 0 1 IOA5 136 - C -- BIDIR 0 1 0 1 IOA6 134 - D -- BIDIR 0 1 0 1 IOA7 123 - E -- BIDIR 0 1 0 1 IOB0 122 - E -- BIDIR 0 1 0 1 IOB1 121 - E -- BIDIR 0 1 0 1 IOB2 120 - E -- BIDIR 0 1 0 1 IOB3 119 - E -- BIDIR 0 1 0 1 IOB4 118 - E -- BIDIR 0 1 0 1 IOB5 117 - E -- BIDIR 0 1 0 1 IOB6 116 - F -- BIDIR 0 1 0 1 IOB7 155 - A -- INPUT 0 0 0 0 /IOCS0 156 - A -- INPUT 0 0 0 0 /IOCS1 157 - A -- INPUT 0 0 0 1 /IOCS2 158 - A -- INPUT 0 0 0 0 /IOCS3 160 - - 28 INPUT 0 0 0 0 /IOCS4 161 - - 27 INPUT 0 0 0 0 /IOCS5 163 - - 26 INPUT 0 0 0 0 /IOCS6 164 - - 25 INPUT 0 0 0 0 /IOCS7 106 - G -- BIDIR 0 1 0 1 IOC0 105 - G -- BIDIR 0 1 0 1 IOC1 104 - G -- BIDIR 0 1 0 1 IOC2 103 - G -- BIDIR 0 1 0 1 IOC3 101 - G -- BIDIR 0 1 0 1 IOC4 100 - - 28 BIDIR 0 1 0 1 IOC5 99 - - 27 BIDIR 0 1 0 1 IOC6 98 - - 26 BIDIR 0 1 0 1 IOC7 90 - - 21 BIDIR 0 1 0 1 IOD0 89 - - 20 BIDIR 0 1 0 1 IOD1 88 - - 20 BIDIR 0 1 0 1 IOD2 87 - - 19 BIDIR 0 1 0 1 IOD3 86 - - 18 BIDIR 0 1 0 1 IOD4 85 - - 17 BIDIR 0 1 0 1 IOD5 84 - - 17 BIDIR 0 1 0 1 IOD6 83 - - 16 BIDIR 0 1 0 1 IOD7 71 - - 10 BIDIR 0 1 0 1 IOE0 70 - - 10 BIDIR 0 1 0 1 IOE1 69 - - 09 BIDIR 0 1 0 1 IOE2 68 - - 08 BIDIR 0 1 0 1 IOE3 67 - - 07 BIDIR 0 1 0 1 IOE4 66 - - 07 BIDIR 0 1 0 1 IOE5 65 - - 06 BIDIR 0 1 0 1 IOE6 64 - - 05 BIDIR 0 1 0 1 IOE7 59 - - 03 BIDIR 0 1 0 1 IOF0 58 - - 03 BIDIR 0 1 0 1 IOF1 57 - - 02 BIDIR 0 1 0 1 IOF2 56 - - 01 BIDIR 0 1 0 1 IOF3 55 - G -- BIDIR 0 1 0 1 IOF4 54 - G -- BIDIR 0 1 0 1 IOF5 53 - G -- BIDIR 0 1 0 1 IOF6 52 - G -- BIDIR 0 1 0 1 IOF7 29 - D -- INPUT 0 0 0 0 /IOR 33 - E -- INPUT 0 0 0 0 /IORACK 30 - D -- INPUT 0 0 0 5 /IOW 39 - F -- INPUT 0 0 0 0 /IRC0 40 - F -- INPUT 0 0 0 0 /IRC1 41 - F -- INPUT 0 0 0 0 /IRC2 42 - F -- INPUT 0 0 0 0 /IRC3 20 - D -- INPUT 0 0 0 0 /MEMCS 22 - D -- INPUT 0 0 0 0 /MRD 23 - D -- INPUT 0 0 0 0 /MWR 21 - D -- INPUT 0 0 0 0 /ROMCS 196 - - 06 INPUT 0 0 0 1 TA0 195 - - 07 INPUT 0 0 0 40 TA1 194 - - 08 INPUT 0 0 0 40 TA2 193 - - 08 INPUT 0 0 0 1 TA3 192 - - 09 INPUT 0 0 0 1 TA4 191 - - 10 INPUT 0 0 0 1 TA5 190 - - 11 INPUT 0 0 0 1 TA6 189 - - 11 INPUT 0 0 0 2 TA7 188 - - 12 INPUT 0 0 0 0 TA8 177 - - 18 INPUT 0 0 0 0 TA9 176 - - 18 INPUT 0 0 0 0 TA10 175 - - 19 INPUT 0 0 0 0 TA11 173 - - 21 INPUT 0 0 0 0 TA12 172 - - 21 INPUT 0 0 0 0 TA13 171 - - 22 INPUT 0 0 0 0 TA14 170 - - 22 INPUT 0 0 0 0 TA15 168 - - 23 INPUT 0 0 0 0 TA16 48 - F -- BIDIR 0 0 0 0 TCLK 203 - - 02 BIDIR 0 1 0 4 TD0 204 - - 01 BIDIR 0 1 0 4 TD1 205 - A -- BIDIR 0 1 0 4 TD2 206 - A -- BIDIR 0 1 0 4 TD3 207 - A -- BIDIR 0 1 0 4 TD4 208 - A -- BIDIR 0 1 0 4 TD5 1 - A -- BIDIR 0 1 0 4 TD6 2 - A -- BIDIR 0 1 0 4 TD7 3 - A -- BIDIR 0 1 0 4 TD8 4 - B -- BIDIR 0 1 0 4 TD9 11 - B -- BIDIR 0 1 0 4 TD10 12 - B -- BIDIR 0 1 0 4 TD11 13 - B -- BIDIR 0 1 0 4 TD12 14 - C -- BIDIR 0 1 0 4 TD13 15 - C -- BIDIR 0 1 0 4 TD14 16 - C -- BIDIR 0 1 0 4 TD15 49 - F -- INPUT 0 0 0 0 /TOUT 24 - - -- INPUT 0 0 0 0 /TRESET Code: s = Synthesized pin or logic cell + = Synchronous flipflop / = Slow slew-rate output ! = NOT gate push-back r = Fitter-inserted logic cell ^ = Increased input delay $ = Driven by fast output logic cell G = Global Source. Fan-out destinations counted here do not include destinations that are driven using global routing resources. Refer to the Auto Global Signals, Clock Signals, Clear Signals, Synchronous Load Signals, and Synchronous Clear Signals Sections of this Report File for information on which signals' fan-outs are used as Clock, Clear, Preset, Output Enable, and synchronous Load signals. Device-Specific Information:c:\max2work\kumagai\univ_if\uiftest\uif_apci54.rpt uif_apci54 ** OUTPUTS ** Fed By Fan-In Fan-Out Pin LC Row Col Primitive Code INP FBK OUT FBK Name 127 - D -- OUTPUT 0 0 0 0 ExtIO0 133 - D -- OUTPUT 0 0 0 0 ExtIO1 145 - B -- OUTPUT 0 1 0 0 IOA_DIR 146 - B -- OUTPUT 0 1 0 0 IOA_EN 143 - B -- TRI 0 1 0 1 IOA0 142 - C -- TRI 0 1 0 1 IOA1 141 - C -- TRI 0 1 0 1 IOA2 139 - C -- TRI 0 1 0 1 IOA3 138 - C -- TRI 0 1 0 1 IOA4 137 - C -- TRI 0 1 0 1 IOA5 136 - C -- TRI 0 1 0 1 IOA6 134 - D -- TRI 0 1 0 1 IOA7 125 - D -- OUTPUT $ 0 1 0 0 IOB_DIR 126 - D -- OUTPUT $ 0 1 0 0 IOB_EN 123 - E -- TRI 0 1 0 1 IOB0 122 - E -- TRI 0 1 0 1 IOB1 121 - E -- TRI 0 1 0 1 IOB2 120 - E -- TRI 0 1 0 1 IOB3 119 - E -- TRI 0 1 0 1 IOB4 118 - E -- TRI 0 1 0 1 IOB5 117 - E -- TRI 0 1 0 1 IOB6 116 - F -- TRI 0 1 0 1 IOB7 108 - F -- OUTPUT $ 0 1 0 0 IOC_DIR 109 - F -- OUTPUT $ 0 1 0 0 IOC_EN 106 - G -- TRI 0 1 0 1 IOC0 105 - G -- TRI 0 1 0 1 IOC1 104 - G -- TRI 0 1 0 1 IOC2 103 - G -- TRI 0 1 0 1 IOC3 101 - G -- TRI 0 1 0 1 IOC4 100 - - 28 TRI 0 1 0 1 IOC5 99 - - 27 TRI 0 1 0 1 IOC6 98 - - 26 TRI 0 1 0 1 IOC7 92 - - 23 OUTPUT 0 1 0 0 IOD_DIR 93 - - 24 OUTPUT 0 1 0 0 IOD_EN 90 - - 21 TRI 0 1 0 1 IOD0 89 - - 20 TRI 0 1 0 1 IOD1 88 - - 20 TRI 0 1 0 1 IOD2 87 - - 19 TRI 0 1 0 1 IOD3 86 - - 18 TRI 0 1 0 1 IOD4 85 - - 17 TRI 0 1 0 1 IOD5 84 - - 17 TRI 0 1 0 1 IOD6 83 - - 16 TRI 0 1 0 1 IOD7 72 - - 11 OUTPUT 0 1 0 0 IOE_DIR 73 - - 12 OUTPUT 0 1 0 0 IOE_EN 71 - - 10 TRI 0 1 0 1 IOE0 70 - - 10 TRI 0 1 0 1 IOE1 69 - - 09 TRI 0 1 0 1 IOE2 68 - - 08 TRI 0 1 0 1 IOE3 67 - - 07 TRI 0 1 0 1 IOE4 66 - - 07 TRI 0 1 0 1 IOE5 65 - - 06 TRI 0 1 0 1 IOE6 64 - - 05 TRI 0 1 0 1 IOE7 60 - - 04 OUTPUT 0 1 0 0 IOF_DIR 61 - - 04 OUTPUT 0 1 0 0 IOF_EN 59 - - 03 TRI 0 1 0 1 IOF0 58 - - 03 TRI 0 1 0 1 IOF1 57 - - 02 TRI 0 1 0 1 IOF2 56 - - 01 TRI 0 1 0 1 IOF3 55 - G -- TRI 0 1 0 1 IOF4 54 - G -- TRI 0 1 0 1 IOF5 53 - G -- TRI 0 1 0 1 IOF6 52 - G -- TRI 0 1 0 1 IOF7 31 - D -- OUTPUT 0 0 0 0 IORDY 32 - E -- OUTPUT 0 0 0 0 /IORREQ 34 - E -- OUTPUT 0 0 0 0 IRQ0 35 - E -- OUTPUT 0 0 0 0 IRQ1 36 - E -- OUTPUT 0 0 0 0 IRQ2 37 - E -- OUTPUT 0 0 0 0 IRQ3 48 - F -- TRI 0 0 0 0 TCLK 203 - - 02 TRI 0 1 0 4 TD0 204 - - 01 TRI 0 1 0 4 TD1 205 - A -- TRI 0 1 0 4 TD2 206 - A -- TRI 0 1 0 4 TD3 207 - A -- TRI 0 1 0 4 TD4 208 - A -- TRI 0 1 0 4 TD5 1 - A -- TRI 0 1 0 4 TD6 2 - A -- TRI 0 1 0 4 TD7 3 - A -- TRI 0 1 0 4 TD8 4 - B -- TRI 0 1 0 4 TD9 11 - B -- TRI 0 1 0 4 TD10 12 - B -- TRI 0 1 0 4 TD11 13 - B -- TRI 0 1 0 4 TD12 14 - C -- TRI 0 1 0 4 TD13 15 - C -- TRI 0 1 0 4 TD14 16 - C -- TRI 0 1 0 4 TD15 Code: s = Synthesized pin or logic cell + = Synchronous flipflop / = Slow slew-rate output ! = NOT gate push-back r = Fitter-inserted logic cell ^ = Increased input delay $ = Driven by fast output logic cell Device-Specific Information:c:\max2work\kumagai\univ_if\uiftest\uif_apci54.rpt uif_apci54 ** BURIED LOGIC ** Fan-In Fan-Out IOC LC Row Col Primitive Code INP FBK OUT FBK Name - 4 E 01 DFF + 0 3 1 1 |apci54_io:244|IOW0 (|apci54_io:244|~12~1) - 3 E 01 DFF + 0 3 1 1 |apci54_io:244|IOW1 (|apci54_io:244|~12~2) - 1 E 01 DFF + 0 3 1 1 |apci54_io:244|IOW2 (|apci54_io:244|~12~3) - 2 E 01 DFF + 0 3 1 1 |apci54_io:244|IOW3 (|apci54_io:244|~12~4) - 1 G 04 DFF + 0 3 1 1 |apci54_io:244|IOW4 (|apci54_io:244|~12~5) - 7 G 04 DFF + 0 3 1 1 |apci54_io:244|IOW5 (|apci54_io:244|~12~6) - 6 G 04 DFF + 0 3 1 1 |apci54_io:244|IOW6 (|apci54_io:244|~12~7) - 2 G 04 DFF + 0 3 1 1 |apci54_io:244|IOW7 (|apci54_io:244|~12~8) - 8 G 04 DFF + 0 3 1 1 |apci54_io:245|IOW0 (|apci54_io:245|~12~1) - 6 D 03 DFF + 0 3 1 1 |apci54_io:245|IOW1 (|apci54_io:245|~12~2) - 2 C 13 DFF + 0 3 1 1 |apci54_io:245|IOW2 (|apci54_io:245|~12~3) - 8 C 13 DFF + 0 3 1 1 |apci54_io:245|IOW3 (|apci54_io:245|~12~4) - 7 C 13 DFF + 0 3 1 1 |apci54_io:245|IOW4 (|apci54_io:245|~12~5) - 1 C 13 DFF + 0 3 1 1 |apci54_io:245|IOW5 (|apci54_io:245|~12~6) - 9 C 13 DFF + 0 3 1 1 |apci54_io:245|IOW6 (|apci54_io:245|~12~7) - 1 D 03 DFF + 0 3 1 1 |apci54_io:245|IOW7 (|apci54_io:245|~12~8) - 6 B 16 DFF + 0 3 1 1 |apci54_io:246|IOW0 (|apci54_io:246|~12~1) - 7 E 25 DFF + 0 3 1 1 |apci54_io:246|IOW1 (|apci54_io:246|~12~2) - 1 E 25 DFF + 0 3 1 1 |apci54_io:246|IOW2 (|apci54_io:246|~12~3) - 7 E 23 DFF + 0 3 1 1 |apci54_io:246|IOW3 (|apci54_io:246|~12~4) - 6 E 25 DFF + 0 3 1 1 |apci54_io:246|IOW4 (|apci54_io:246|~12~5) - 1 E 23 DFF + 0 3 1 1 |apci54_io:246|IOW5 (|apci54_io:246|~12~6) - 6 E 23 DFF + 0 3 1 1 |apci54_io:246|IOW6 (|apci54_io:246|~12~7) - 1 B 16 DFF + 0 3 1 1 |apci54_io:246|IOW7 (|apci54_io:246|~12~8) - 4 G 04 DFF + 0 3 1 1 |apci54_io:247|IOW0 (|apci54_io:247|~12~1) - 9 G 04 DFF + 0 3 1 1 |apci54_io:247|IOW1 (|apci54_io:247|~12~2) - 5 G 04 DFF + 0 3 1 1 |apci54_io:247|IOW2 (|apci54_io:247|~12~3) - 10 G 04 DFF + 0 3 1 1 |apci54_io:247|IOW3 (|apci54_io:247|~12~4) - 3 G 04 DFF + 0 3 1 1 |apci54_io:247|IOW4 (|apci54_io:247|~12~5) - 6 A 05 DFF + 0 3 1 1 |apci54_io:247|IOW5 (|apci54_io:247|~12~6) - 7 A 05 DFF + 0 3 1 1 |apci54_io:247|IOW6 (|apci54_io:247|~12~7) - 7 D 03 DFF + 0 3 1 1 |apci54_io:247|IOW7 (|apci54_io:247|~12~8) - 3 E 23 DFF + 0 3 1 1 |apci54_io:248|IOW0 (|apci54_io:248|~12~1) - 3 E 25 DFF + 0 3 1 1 |apci54_io:248|IOW1 (|apci54_io:248|~12~2) - 8 E 25 DFF + 0 3 1 1 |apci54_io:248|IOW2 (|apci54_io:248|~12~3) - 9 E 23 DFF + 0 3 1 1 |apci54_io:248|IOW3 (|apci54_io:248|~12~4) - 2 E 25 DFF + 0 3 1 1 |apci54_io:248|IOW4 (|apci54_io:248|~12~5) - 2 E 23 DFF + 0 3 1 1 |apci54_io:248|IOW5 (|apci54_io:248|~12~6) - 8 E 23 DFF + 0 3 1 1 |apci54_io:248|IOW6 (|apci54_io:248|~12~7) - 6 F 16 DFF + 0 3 1 1 |apci54_io:248|IOW7 (|apci54_io:248|~12~8) - 6 B 06 DFF + 0 3 1 1 |apci54_io:249|IOW0 (|apci54_io:249|~12~1) - 7 C 04 DFF + 0 3 1 1 |apci54_io:249|IOW1 (|apci54_io:249|~12~2) - 3 C 13 DFF + 0 3 1 1 |apci54_io:249|IOW2 (|apci54_io:249|~12~3) - 6 C 13 DFF + 0 3 1 1 |apci54_io:249|IOW3 (|apci54_io:249|~12~4) - 4 C 13 DFF + 0 3 1 1 |apci54_io:249|IOW4 (|apci54_io:249|~12~5) - 10 C 13 DFF + 0 3 1 1 |apci54_io:249|IOW5 (|apci54_io:249|~12~6) - 5 C 13 DFF + 0 3 1 1 |apci54_io:249|IOW6 (|apci54_io:249|~12~7) - 2 D 03 DFF + 0 3 1 1 |apci54_io:249|IOW7 (|apci54_io:249|~12~8) - 5 D 01 AND2 s 4 0 0 2 /TCS~1 (|BNAND5:263|~1~1) - 2 B 18 LCELL s 0 1 1 0 IOA_EN~1 - 2 D 28 LCELL s 0 1 1 0 IOB_EN~1 - 2 F 28 LCELL s 0 1 1 0 IOC_EN~1 - 2 A 23 SOFT s r 1 0 0 0 /IOCS2~fit~out - 1 G 18 LCELL s 0 1 1 0 IOD_EN~1 - 3 G 13 LCELL s 0 1 1 0 IOF_EN~1 - 3 B 14 LCELL 0 5 1 11 |LPM_COMPARE:256|comptree:comparator.aeb (|LPM_COMPARE:256|comptree:comparator|cmpchain:cmp_end|aeb_out) - 2 B 14 CASCADE 0 4 0 1 |LPM_COMPARE:256|comptree:comparator|cmpchain:cmp_end|ecasc0 - 10 D 01 LCELL 3 1 0 8 |LPM_DECODE:259|lpm_compare:comparator0|comptree:comparator.aeb (|LPM_DECODE:259|lpm_compare:comparator0|comptree:comparator|cmpchain:cmp_end|aeb_out) - 7 D 01 LCELL 3 1 0 8 |LPM_DECODE:259|lpm_compare:comparator1|comptree:comparator.aeb (|LPM_DECODE:259|lpm_compare:comparator1|comptree:comparator|cmpchain:cmp_end|aeb_out) - 1 D 01 LCELL 3 1 0 8 |LPM_DECODE:259|lpm_compare:comparator2|comptree:comparator.aeb (|LPM_DECODE:259|lpm_compare:comparator2|comptree:comparator|cmpchain:cmp_end|aeb_out) - 2 D 01 LCELL 3 1 0 8 |LPM_DECODE:259|lpm_compare:comparator3|comptree:comparator.aeb (|LPM_DECODE:259|lpm_compare:comparator3|comptree:comparator|cmpchain:cmp_end|aeb_out) - 2 D 24 LCELL 2 1 0 8 |LPM_DECODE:262|lpm_compare:comparator0|comptree:comparator.aeb (|LPM_DECODE:262|lpm_compare:comparator0|comptree:comparator|cmpchain:cmp_end|aeb_out) - 3 D 24 LCELL 2 1 0 8 |LPM_DECODE:262|lpm_compare:comparator1|comptree:comparator.aeb (|LPM_DECODE:262|lpm_compare:comparator1|comptree:comparator|cmpchain:cmp_end|aeb_out) - 3 D 11 LCELL 2 1 0 8 |LPM_DECODE:262|lpm_compare:comparator2|comptree:comparator.aeb (|LPM_DECODE:262|lpm_compare:comparator2|comptree:comparator|cmpchain:cmp_end|aeb_out) - 6 D 05 LCELL 2 1 0 8 |LPM_DECODE:262|lpm_compare:comparator3|comptree:comparator.aeb (|LPM_DECODE:262|lpm_compare:comparator3|comptree:comparator|cmpchain:cmp_end|aeb_out) - 9 B 28 OR2 2 3 1 0 |LPM_MUX:250|muxlut:150.result (|LPM_MUX:250|muxlut:150|result_node) - 8 B 28 CASCADE 2 2 0 1 |LPM_MUX:250|muxlut:150|:41 - 7 C 22 OR2 2 3 1 0 |LPM_MUX:250|muxlut:168.result (|LPM_MUX:250|muxlut:168|result_node) - 6 C 22 CASCADE 2 2 0 1 |LPM_MUX:250|muxlut:168|:41 - 5 A 15 OR2 2 3 1 0 |LPM_MUX:250|muxlut:186.result (|LPM_MUX:250|muxlut:186|result_node) - 4 A 15 CASCADE 2 2 0 1 |LPM_MUX:250|muxlut:186|:41 - 7 A 15 OR2 2 3 1 0 |LPM_MUX:250|muxlut:204.result (|LPM_MUX:250|muxlut:204|result_node) - 6 A 15 CASCADE 2 2 0 1 |LPM_MUX:250|muxlut:204|:41 - 3 A 12 OR2 2 3 1 0 |LPM_MUX:250|muxlut:222.result (|LPM_MUX:250|muxlut:222|result_node) - 2 A 12 CASCADE 2 2 0 1 |LPM_MUX:250|muxlut:222|:41 - 5 A 12 OR2 2 3 1 0 |LPM_MUX:250|muxlut:240.result (|LPM_MUX:250|muxlut:240|result_node) - 4 A 12 CASCADE 2 2 0 1 |LPM_MUX:250|muxlut:240|:41 - 5 A 05 OR2 2 3 1 0 |LPM_MUX:250|muxlut:258.result (|LPM_MUX:250|muxlut:258|result_node) - 4 A 05 CASCADE 2 2 0 1 |LPM_MUX:250|muxlut:258|:41 - 3 A 05 OR2 2 3 1 0 |LPM_MUX:250|muxlut:276.result (|LPM_MUX:250|muxlut:276|result_node) - 2 A 05 CASCADE 2 2 0 1 |LPM_MUX:250|muxlut:276|:41 - 3 A 15 OR2 2 2 1 0 |LPM_MUX:250|muxlut:294.result (|LPM_MUX:250|muxlut:294|result_node) - 2 A 15 CASCADE 2 2 0 1 |LPM_MUX:250|muxlut:294|:41 - 3 B 28 OR2 2 2 1 0 |LPM_MUX:250|muxlut:312.result (|LPM_MUX:250|muxlut:312|result_node) - 2 B 28 CASCADE 2 2 0 1 |LPM_MUX:250|muxlut:312|:41 - 5 B 28 OR2 2 2 1 0 |LPM_MUX:250|muxlut:330.result (|LPM_MUX:250|muxlut:330|result_node) - 4 B 28 CASCADE 2 2 0 1 |LPM_MUX:250|muxlut:330|:41 - 3 B 03 OR2 2 2 1 0 |LPM_MUX:250|muxlut:348.result (|LPM_MUX:250|muxlut:348|result_node) - 2 B 03 CASCADE 2 2 0 1 |LPM_MUX:250|muxlut:348|:41 - 7 B 28 OR2 2 2 1 0 |LPM_MUX:250|muxlut:366.result (|LPM_MUX:250|muxlut:366|result_node) - 6 B 28 CASCADE 2 2 0 1 |LPM_MUX:250|muxlut:366|:41 - 3 C 09 OR2 2 2 1 0 |LPM_MUX:250|muxlut:384.result (|LPM_MUX:250|muxlut:384|result_node) - 2 C 09 CASCADE 2 2 0 1 |LPM_MUX:250|muxlut:384|:41 - 3 C 22 OR2 2 2 1 0 |LPM_MUX:250|muxlut:402.result (|LPM_MUX:250|muxlut:402|result_node) - 2 C 22 CASCADE 2 2 0 1 |LPM_MUX:250|muxlut:402|:41 - 5 C 22 OR2 2 2 1 0 |LPM_MUX:250|muxlut:420.result (|LPM_MUX:250|muxlut:420|result_node) - 4 C 22 CASCADE 2 2 0 1 |LPM_MUX:250|muxlut:420|:41 - 1 B 06 DFF + 0 3 0 3 DIRR0 (~251~1) - 6 D 13 DFF + 0 3 0 3 DIRR1 (~251~2) - 6 A 13 DFF + 0 3 0 3 DIRR2 (~251~3) - 2 A 14 DFF + 0 3 0 3 DIRR3 (~251~4) - 6 A 12 DFF + 0 3 0 3 DIRR4 (~251~5) - 7 A 12 DFF + 0 3 0 3 DIRR5 (~251~6) - 9 A 05 DFF + 0 3 0 2 DIRR6 (~251~7) - 8 A 05 DFF + 0 3 0 2 DIRR7 (~251~8) - 2 B 25 AND2 0 2 1 0 DIR0 (~252~1) - 1 D 28 AND2 0 2 1 0 DIR1 (~252~2) - 1 F 28 AND2 0 2 1 0 DIR2 (~252~3) - 2 G 18 AND2 0 2 1 0 DIR3 (~252~4) - 1 G 13 AND2 0 2 1 0 DIR4 (~252~5) - 2 G 13 AND2 0 2 1 0 DIR5 (~252~6) - 9 B 14 DFF + 0 3 0 2 Key0 (~255~1) - 6 B 14 DFF + 0 3 0 2 Key1 (~255~2) - 8 B 14 DFF + 0 3 0 2 Key2 (~255~3) - 4 B 14 DFF + 0 3 0 2 Key3 (~255~4) - 7 B 14 DFF + 0 3 0 2 Key4 (~255~5) - 1 C 04 DFF + 0 3 0 2 Key5 (~255~6) - 6 C 04 DFF + 0 3 0 2 Key6 (~255~7) - 1 B 14 DFF + 0 3 0 2 Key7 (~255~8) - 4 D 01 AND2 s 2 1 0 4 ~264~1 - 3 D 01 AND2 3 1 0 4 :265 Code: s = Synthesized pin or logic cell + = Synchronous flipflop / = Slow slew-rate output ! = NOT gate push-back r = Fitter-inserted logic cell ^ = Increased input delay $ = Driven by fast output logic cell p = Packed register Device-Specific Information:c:\max2work\kumagai\univ_if\uiftest\uif_apci54.rpt uif_apci54 ** FASTTRACK INTERCONNECT UTILIZATION ** Row FastTrack Interconnect: Global Left Half- Right Half- FastTrack FastTrack FastTrack Row Interconnect Interconnect Interconnect Input Pins Output Pins Bidir Pins A: 26/124( 20%) 19/ 62( 30%) 6/ 62( 9%) 4/20( 20%) 0/20( 0%) 7/20( 35%) B: 23/124( 18%) 13/ 62( 20%) 9/ 62( 14%) 0/20( 0%) 2/20( 10%) 5/20( 25%) C: 29/124( 23%) 10/ 62( 16%) 6/ 62( 9%) 0/20( 0%) 0/20( 0%) 9/20( 45%) D: 8/124( 6%) 14/ 62( 22%) 0/ 62( 0%) 6/20( 30%) 6/20( 30%) 1/20( 5%) E: 19/124( 15%) 1/ 62( 1%) 5/ 62( 8%) 1/20( 5%) 5/20( 25%) 7/20( 35%) F: 6/124( 4%) 0/ 62( 0%) 1/ 62( 1%) 5/20( 25%) 2/20( 10%) 2/20( 10%) G: 30/124( 24%) 23/ 62( 37%) 10/ 62( 16%) 0/20( 0%) 0/20( 0%) 9/20( 45%) Column FastTrack Interconnect: FastTrack Column Interconnect Input Pins Output Pins Bidir Pins 01: 12/30( 40%) 0/4( 0%) 0/4( 0%) 2/4( 50%) 02: 2/30( 6%) 0/4( 0%) 0/4( 0%) 2/4( 50%) 03: 7/30( 23%) 0/4( 0%) 0/4( 0%) 2/4( 50%) 04: 3/30( 10%) 0/4( 0%) 2/4( 50%) 0/4( 0%) 05: 5/30( 16%) 0/4( 0%) 0/4( 0%) 1/4( 25%) 06: 3/30( 10%) 2/4( 50%) 0/4( 0%) 1/4( 25%) 07: 3/30( 10%) 1/4( 25%) 0/4( 0%) 2/4( 50%) 08: 3/30( 10%) 2/4( 50%) 0/4( 0%) 1/4( 25%) 09: 5/30( 16%) 1/4( 25%) 0/4( 0%) 1/4( 25%) 10: 3/30( 10%) 1/4( 25%) 0/4( 0%) 2/4( 50%) 11: 5/30( 16%) 2/4( 50%) 1/4( 25%) 0/4( 0%) 12: 5/30( 16%) 1/4( 25%) 1/4( 25%) 0/4( 0%) 13: 8/30( 26%) 0/4( 0%) 0/4( 0%) 0/4( 0%) 14: 3/30( 10%) 0/4( 0%) 0/4( 0%) 0/4( 0%) 15: 2/30( 6%) 0/4( 0%) 0/4( 0%) 0/4( 0%) 16: 4/30( 13%) 0/4( 0%) 0/4( 0%) 1/4( 25%) 17: 5/30( 16%) 0/4( 0%) 0/4( 0%) 2/4( 50%) 18: 3/30( 10%) 2/4( 50%) 0/4( 0%) 1/4( 25%) 19: 2/30( 6%) 1/4( 25%) 0/4( 0%) 1/4( 25%) 20: 4/30( 13%) 0/4( 0%) 0/4( 0%) 2/4( 50%) 21: 2/30( 6%) 2/4( 50%) 0/4( 0%) 1/4( 25%) 22: 3/30( 10%) 2/4( 50%) 0/4( 0%) 0/4( 0%) 23: 5/30( 16%) 1/4( 25%) 1/4( 25%) 0/4( 0%) 24: 5/30( 16%) 0/4( 0%) 1/4( 25%) 0/4( 0%) 25: 4/30( 13%) 1/4( 25%) 0/4( 0%) 0/4( 0%) 26: 2/30( 6%) 1/4( 25%) 0/4( 0%) 1/4( 25%) 27: 4/30( 13%) 1/4( 25%) 0/4( 0%) 1/4( 25%) 28: 4/30( 13%) 1/4( 25%) 0/4( 0%) 1/4( 25%) Device-Specific Information:c:\max2work\kumagai\univ_if\uiftest\uif_apci54.rpt uif_apci54 ** CLOCK SIGNALS ** Type Fan-out Name INPUT 64 BCLK Device-Specific Information:c:\max2work\kumagai\univ_if\uiftest\uif_apci54.rpt uif_apci54 ** EQUATIONS ** BCLK : INPUT; ExtClock0 : INPUT; ExtClock1 : INPUT; TA0 : INPUT; TA1 : INPUT; TA2 : INPUT; TA3 : INPUT; TA4 : INPUT; TA5 : INPUT; TA6 : INPUT; TA7 : INPUT; TA8 : INPUT; TA9 : INPUT; TA10 : INPUT; TA11 : INPUT; TA12 : INPUT; TA13 : INPUT; TA14 : INPUT; TA15 : INPUT; TA16 : INPUT; /BHE : INPUT; /IOCS0 : INPUT; /IOCS1 : INPUT; /IOCS2 : INPUT; /IOCS3 : INPUT; /IOCS4 : INPUT; /IOCS5 : INPUT; /IOCS6 : INPUT; /IOCS7 : INPUT; /IOR : INPUT; /IORACK : INPUT; /IOW : INPUT; /IRC0 : INPUT; /IRC1 : INPUT; /IRC2 : INPUT; /IRC3 : INPUT; /MEMCS : INPUT; /MRD : INPUT; /MWR : INPUT; /ROMCS : INPUT; /TOUT : INPUT; /TRESET : INPUT; -- Node name is '~251~1' = 'DIRR0' -- Equation name is '~251~1', location is LC1_B6, type is buried. DIRR0 = DFF( _EQ001, GLOBAL( BCLK), VCC, VCC); _EQ001 = DIRR0 & !_LC2_D1 # _LC2_D1 & TD0; -- Node name is '~251~2' = 'DIRR1' -- Equation name is '~251~2', location is LC6_D13, type is buried. DIRR1 = DFF( _EQ002, GLOBAL( BCLK), VCC, VCC); _EQ002 = DIRR1 & !_LC2_D1 # _LC2_D1 & TD1; -- Node name is '~251~3' = 'DIRR2' -- Equation name is '~251~3', location is LC6_A13, type is buried. DIRR2 = DFF( _EQ003, GLOBAL( BCLK), VCC, VCC); _EQ003 = DIRR2 & !_LC2_D1 # _LC2_D1 & TD2; -- Node name is '~251~4' = 'DIRR3' -- Equation name is '~251~4', location is LC2_A14, type is buried. DIRR3 = DFF( _EQ004, GLOBAL( BCLK), VCC, VCC); _EQ004 = DIRR3 & !_LC2_D1 # _LC2_D1 & TD3; -- Node name is '~251~5' = 'DIRR4' -- Equation name is '~251~5', location is LC6_A12, type is buried. DIRR4 = DFF( _EQ005, GLOBAL( BCLK), VCC, VCC); _EQ005 = DIRR4 & !_LC2_D1 # _LC2_D1 & TD4; -- Node name is '~251~6' = 'DIRR5' -- Equation name is '~251~6', location is LC7_A12, type is buried. DIRR5 = DFF( _EQ006, GLOBAL( BCLK), VCC, VCC); _EQ006 = DIRR5 & !_LC2_D1 # _LC2_D1 & TD5; -- Node name is '~251~7' = 'DIRR6' -- Equation name is '~251~7', location is LC9_A5, type is buried. DIRR6 = DFF( _EQ007, GLOBAL( BCLK), VCC, VCC); _EQ007 = DIRR6 & !_LC2_D1 # _LC2_D1 & TD6; -- Node name is '~251~8' = 'DIRR7' -- Equation name is '~251~8', location is LC8_A5, type is buried. DIRR7 = DFF( _EQ008, GLOBAL( BCLK), VCC, VCC); _EQ008 = DIRR7 & !_LC2_D1 # _LC2_D1 & TD7; -- Node name is '~252~1' = 'DIR0' -- Equation name is '~252~1', location is LC2_B25, type is buried. DIR0 = LCELL( _EQ009); _EQ009 = !DIRR0 & _LC3_B14; -- Node name is '~252~2' = 'DIR1' -- Equation name is '~252~2', location is LC1_D28, type is buried. DIR1 = LCELL( _EQ010); _EQ010 = !DIRR1 & _LC3_B14; -- Node name is '~252~3' = 'DIR2' -- Equation name is '~252~3', location is LC1_F28, type is buried. DIR2 = LCELL( _EQ011); _EQ011 = !DIRR2 & _LC3_B14; -- Node name is '~252~4' = 'DIR3' -- Equation name is '~252~4', location is LC2_G18, type is buried. DIR3 = LCELL( _EQ012); _EQ012 = !DIRR3 & _LC3_B14; -- Node name is '~252~5' = 'DIR4' -- Equation name is '~252~5', location is LC1_G13, type is buried. DIR4 = LCELL( _EQ013); _EQ013 = !DIRR4 & _LC3_B14; -- Node name is '~252~6' = 'DIR5' -- Equation name is '~252~6', location is LC2_G13, type is buried. DIR5 = LCELL( _EQ014); _EQ014 = !DIRR5 & _LC3_B14; -- Node name is 'ExtIO0' -- Equation name is 'ExtIO0', type is output ExtIO0 = GND; -- Node name is 'ExtIO1' -- Equation name is 'ExtIO1', type is output ExtIO1 = GND; -- Node name is 'IOA_DIR' -- Equation name is 'IOA_DIR', type is output IOA_DIR = DIR0; -- Node name is 'IOA_EN' -- Equation name is 'IOA_EN', type is output IOA_EN = !_LC2_B18; -- Node name is 'IOA_EN~1' -- Equation name is 'IOA_EN~1', location is LC2_B18, type is buried. -- synthesized logic cell _LC2_B18 = LCELL( _LC3_B14); -- Node name is 'IOA0' -- Equation name is 'IOA0', type is bidir IOA0 = TRI(_LC6_B6, DIR0); -- Node name is 'IOA1' -- Equation name is 'IOA1', type is bidir IOA1 = TRI(_LC7_C4, DIR0); -- Node name is 'IOA2' -- Equation name is 'IOA2', type is bidir IOA2 = TRI(_LC3_C13, DIR0); -- Node name is 'IOA3' -- Equation name is 'IOA3', type is bidir IOA3 = TRI(_LC6_C13, DIR0); -- Node name is 'IOA4' -- Equation name is 'IOA4', type is bidir IOA4 = TRI(_LC4_C13, DIR0); -- Node name is 'IOA5' -- Equation name is 'IOA5', type is bidir IOA5 = TRI(_LC10_C13, DIR0); -- Node name is 'IOA6' -- Equation name is 'IOA6', type is bidir IOA6 = TRI(_LC5_C13, DIR0); -- Node name is 'IOA7' -- Equation name is 'IOA7', type is bidir IOA7 = TRI(_LC2_D3, DIR0); -- Node name is 'IOB_DIR' -- Equation name is 'IOB_DIR', type is output IOB_DIR = DIR1; -- Node name is 'IOB_EN' -- Equation name is 'IOB_EN', type is output IOB_EN = !_LC2_D28; -- Node name is 'IOB_EN~1' -- Equation name is 'IOB_EN~1', location is LC2_D28, type is buried. -- synthesized logic cell _LC2_D28 = LCELL( _LC3_B14); -- Node name is 'IOB0' -- Equation name is 'IOB0', type is bidir IOB0 = TRI(_LC3_E23, DIR1); -- Node name is 'IOB1' -- Equation name is 'IOB1', type is bidir IOB1 = TRI(_LC3_E25, DIR1); -- Node name is 'IOB2' -- Equation name is 'IOB2', type is bidir IOB2 = TRI(_LC8_E25, DIR1); -- Node name is 'IOB3' -- Equation name is 'IOB3', type is bidir IOB3 = TRI(_LC9_E23, DIR1); -- Node name is 'IOB4' -- Equation name is 'IOB4', type is bidir IOB4 = TRI(_LC2_E25, DIR1); -- Node name is 'IOB5' -- Equation name is 'IOB5', type is bidir IOB5 = TRI(_LC2_E23, DIR1); -- Node name is 'IOB6' -- Equation name is 'IOB6', type is bidir IOB6 = TRI(_LC8_E23, DIR1); -- Node name is 'IOB7' -- Equation name is 'IOB7', type is bidir IOB7 = TRI(_LC6_F16, DIR1); -- Node name is 'IOC_DIR' -- Equation name is 'IOC_DIR', type is output IOC_DIR = DIR2; -- Node name is 'IOC_EN' -- Equation name is 'IOC_EN', type is output IOC_EN = !_LC2_F28; -- Node name is 'IOC_EN~1' -- Equation name is 'IOC_EN~1', location is LC2_F28, type is buried. -- synthesized logic cell _LC2_F28 = LCELL( _LC3_B14); -- Node name is 'IOC0' -- Equation name is 'IOC0', type is bidir IOC0 = TRI(_LC4_G4, DIR2); -- Node name is 'IOC1' -- Equation name is 'IOC1', type is bidir IOC1 = TRI(_LC9_G4, DIR2); -- Node name is 'IOC2' -- Equation name is 'IOC2', type is bidir IOC2 = TRI(_LC5_G4, DIR2); -- Node name is 'IOC3' -- Equation name is 'IOC3', type is bidir IOC3 = TRI(_LC10_G4, DIR2); -- Node name is 'IOC4' -- Equation name is 'IOC4', type is bidir IOC4 = TRI(_LC3_G4, DIR2); -- Node name is 'IOC5' -- Equation name is 'IOC5', type is bidir IOC5 = TRI(_LC6_A5, DIR2); -- Node name is 'IOC6' -- Equation name is 'IOC6', type is bidir IOC6 = TRI(_LC7_A5, DIR2); -- Node name is 'IOC7' -- Equation name is 'IOC7', type is bidir IOC7 = TRI(_LC7_D3, DIR2); -- Node name is 'IOD_DIR' -- Equation name is 'IOD_DIR', type is output IOD_DIR = DIR3; -- Node name is 'IOD_EN' -- Equation name is 'IOD_EN', type is output IOD_EN = !_LC1_G18; -- Node name is 'IOD_EN~1' -- Equation name is 'IOD_EN~1', location is LC1_G18, type is buried. -- synthesized logic cell _LC1_G18 = LCELL( _LC3_B14); -- Node name is 'IOD0' -- Equation name is 'IOD0', type is bidir IOD0 = TRI(_LC6_B16, DIR3); -- Node name is 'IOD1' -- Equation name is 'IOD1', type is bidir IOD1 = TRI(_LC7_E25, DIR3); -- Node name is 'IOD2' -- Equation name is 'IOD2', type is bidir IOD2 = TRI(_LC1_E25, DIR3); -- Node name is 'IOD3' -- Equation name is 'IOD3', type is bidir IOD3 = TRI(_LC7_E23, DIR3); -- Node name is 'IOD4' -- Equation name is 'IOD4', type is bidir IOD4 = TRI(_LC6_E25, DIR3); -- Node name is 'IOD5' -- Equation name is 'IOD5', type is bidir IOD5 = TRI(_LC1_E23, DIR3); -- Node name is 'IOD6' -- Equation name is 'IOD6', type is bidir IOD6 = TRI(_LC6_E23, DIR3); -- Node name is 'IOD7' -- Equation name is 'IOD7', type is bidir IOD7 = TRI(_LC1_B16, DIR3); -- Node name is 'IOE_DIR' -- Equation name is 'IOE_DIR', type is output IOE_DIR = DIR4; -- Node name is 'IOE_EN' -- Equation name is 'IOE_EN', type is output IOE_EN = !_LC3_B14; -- Node name is 'IOE0' -- Equation name is 'IOE0', type is bidir IOE0 = TRI(_LC8_G4, DIR4); -- Node name is 'IOE1' -- Equation name is 'IOE1', type is bidir IOE1 = TRI(_LC6_D3, DIR4); -- Node name is 'IOE2' -- Equation name is 'IOE2', type is bidir IOE2 = TRI(_LC2_C13, DIR4); -- Node name is 'IOE3' -- Equation name is 'IOE3', type is bidir IOE3 = TRI(_LC8_C13, DIR4); -- Node name is 'IOE4' -- Equation name is 'IOE4', type is bidir IOE4 = TRI(_LC7_C13, DIR4); -- Node name is 'IOE5' -- Equation name is 'IOE5', type is bidir IOE5 = TRI(_LC1_C13, DIR4); -- Node name is 'IOE6' -- Equation name is 'IOE6', type is bidir IOE6 = TRI(_LC9_C13, DIR4); -- Node name is 'IOE7' -- Equation name is 'IOE7', type is bidir IOE7 = TRI(_LC1_D3, DIR4); -- Node name is 'IOF_DIR' -- Equation name is 'IOF_DIR', type is output IOF_DIR = DIR5; -- Node name is 'IOF_EN' -- Equation name is 'IOF_EN', type is output IOF_EN = !_LC3_G13; -- Node name is 'IOF_EN~1' -- Equation name is 'IOF_EN~1', location is LC3_G13, type is buried. -- synthesized logic cell _LC3_G13 = LCELL( _LC3_B14); -- Node name is 'IOF0' -- Equation name is 'IOF0', type is bidir IOF0 = TRI(_LC4_E1, DIR5); -- Node name is 'IOF1' -- Equation name is 'IOF1', type is bidir IOF1 = TRI(_LC3_E1, DIR5); -- Node name is 'IOF2' -- Equation name is 'IOF2', type is bidir IOF2 = TRI(_LC1_E1, DIR5); -- Node name is 'IOF3' -- Equation name is 'IOF3', type is bidir IOF3 = TRI(_LC2_E1, DIR5); -- Node name is 'IOF4' -- Equation name is 'IOF4', type is bidir IOF4 = TRI(_LC1_G4, DIR5); -- Node name is 'IOF5' -- Equation name is 'IOF5', type is bidir IOF5 = TRI(_LC7_G4, DIR5); -- Node name is 'IOF6' -- Equation name is 'IOF6', type is bidir IOF6 = TRI(_LC6_G4, DIR5); -- Node name is 'IOF7' -- Equation name is 'IOF7', type is bidir IOF7 = TRI(_LC2_G4, DIR5); -- Node name is 'IORDY' -- Equation name is 'IORDY', type is output IORDY = VCC; -- Node name is 'IRQ0' -- Equation name is 'IRQ0', type is output IRQ0 = GND; -- Node name is 'IRQ1' -- Equation name is 'IRQ1', type is output IRQ1 = GND; -- Node name is 'IRQ2' -- Equation name is 'IRQ2', type is output IRQ2 = GND; -- Node name is 'IRQ3' -- Equation name is 'IRQ3', type is output IRQ3 = GND; -- Node name is '~255~1' = 'Key0' -- Equation name is '~255~1', location is LC9_B14, type is buried. Key0 = DFF( _EQ015, GLOBAL( BCLK), VCC, VCC); _EQ015 = Key0 & !_LC6_D5 # _LC6_D5 & TD8; -- Node name is '~255~2' = 'Key1' -- Equation name is '~255~2', location is LC6_B14, type is buried. Key1 = DFF( _EQ016, GLOBAL( BCLK), VCC, VCC); _EQ016 = Key1 & !_LC6_D5 # _LC6_D5 & TD9; -- Node name is '~255~3' = 'Key2' -- Equation name is '~255~3', location is LC8_B14, type is buried. Key2 = DFF( _EQ017, GLOBAL( BCLK), VCC, VCC); _EQ017 = Key2 & !_LC6_D5 # _LC6_D5 & TD10; -- Node name is '~255~4' = 'Key3' -- Equation name is '~255~4', location is LC4_B14, type is buried. Key3 = DFF( _EQ018, GLOBAL( BCLK), VCC, VCC); _EQ018 = Key3 & !_LC6_D5 # _LC6_D5 & TD11; -- Node name is '~255~5' = 'Key4' -- Equation name is '~255~5', location is LC7_B14, type is buried. Key4 = DFF( _EQ019, GLOBAL( BCLK), VCC, VCC); _EQ019 = Key4 & !_LC6_D5 # _LC6_D5 & TD12; -- Node name is '~255~6' = 'Key5' -- Equation name is '~255~6', location is LC1_C4, type is buried. Key5 = DFF( _EQ020, GLOBAL( BCLK), VCC, VCC); _EQ020 = Key5 & !_LC6_D5 # _LC6_D5 & TD13; -- Node name is '~255~7' = 'Key6' -- Equation name is '~255~7', location is LC6_C4, type is buried. Key6 = DFF( _EQ021, GLOBAL( BCLK), VCC, VCC); _EQ021 = Key6 & !_LC6_D5 # _LC6_D5 & TD14; -- Node name is '~255~8' = 'Key7' -- Equation name is '~255~8', location is LC1_B14, type is buried. Key7 = DFF( _EQ022, GLOBAL( BCLK), VCC, VCC); _EQ022 = Key7 & !_LC6_D5 # _LC6_D5 & TD15; -- Node name is 'TCLK' -- Equation name is 'TCLK', type is bidir TCLK = TRI(GND, GND); -- Node name is 'TD0' -- Equation name is 'TD0', type is bidir TD0 = TRI(_LC9_B28, !_LC2_A23); -- Node name is 'TD1' -- Equation name is 'TD1', type is bidir TD1 = TRI(_LC7_C22, !_LC2_A23); -- Node name is 'TD2' -- Equation name is 'TD2', type is bidir TD2 = TRI(_LC5_A15, !_LC2_A23); -- Node name is 'TD3' -- Equation name is 'TD3', type is bidir TD3 = TRI(_LC7_A15, !_LC2_A23); -- Node name is 'TD4' -- Equation name is 'TD4', type is bidir TD4 = TRI(_LC3_A12, !_LC2_A23); -- Node name is 'TD5' -- Equation name is 'TD5', type is bidir TD5 = TRI(_LC5_A12, !_LC2_A23); -- Node name is 'TD6' -- Equation name is 'TD6', type is bidir TD6 = TRI(_LC5_A5, !_LC2_A23); -- Node name is 'TD7' -- Equation name is 'TD7', type is bidir TD7 = TRI(_LC3_A5, !_LC2_A23); -- Node name is 'TD8' -- Equation name is 'TD8', type is bidir TD8 = TRI(_LC3_A15, !_LC2_A23); -- Node name is 'TD9' -- Equation name is 'TD9', type is bidir TD9 = TRI(_LC3_B28, !_LC2_A23); -- Node name is 'TD10' -- Equation name is 'TD10', type is bidir TD10 = TRI(_LC5_B28, !_LC2_A23); -- Node name is 'TD11' -- Equation name is 'TD11', type is bidir TD11 = TRI(_LC3_B3, !_LC2_A23); -- Node name is 'TD12' -- Equation name is 'TD12', type is bidir TD12 = TRI(_LC7_B28, !_LC2_A23); -- Node name is 'TD13' -- Equation name is 'TD13', type is bidir TD13 = TRI(_LC3_C9, !_LC2_A23); -- Node name is 'TD14' -- Equation name is 'TD14', type is bidir TD14 = TRI(_LC3_C22, !_LC2_A23); -- Node name is 'TD15' -- Equation name is 'TD15', type is bidir TD15 = TRI(_LC5_C22, !_LC2_A23); -- Node name is '|apci54_io:244|~12~1' = '|apci54_io:244|IOW0' -- Equation name is '_LC4_E1', type is buried _LC4_E1 = DFF( _EQ023, GLOBAL( BCLK), VCC, VCC); _EQ023 = !_LC3_D11 & _LC4_E1 # _LC3_D11 & TD8; -- Node name is '|apci54_io:244|~12~2' = '|apci54_io:244|IOW1' -- Equation name is '_LC3_E1', type is buried _LC3_E1 = DFF( _EQ024, GLOBAL( BCLK), VCC, VCC); _EQ024 = !_LC3_D11 & _LC3_E1 # _LC3_D11 & TD9; -- Node name is '|apci54_io:244|~12~3' = '|apci54_io:244|IOW2' -- Equation name is '_LC1_E1', type is buried _LC1_E1 = DFF( _EQ025, GLOBAL( BCLK), VCC, VCC); _EQ025 = _LC1_E1 & !_LC3_D11 # _LC3_D11 & TD10; -- Node name is '|apci54_io:244|~12~4' = '|apci54_io:244|IOW3' -- Equation name is '_LC2_E1', type is buried _LC2_E1 = DFF( _EQ026, GLOBAL( BCLK), VCC, VCC); _EQ026 = _LC2_E1 & !_LC3_D11 # _LC3_D11 & TD11; -- Node name is '|apci54_io:244|~12~5' = '|apci54_io:244|IOW4' -- Equation name is '_LC1_G4', type is buried _LC1_G4 = DFF( _EQ027, GLOBAL( BCLK), VCC, VCC); _EQ027 = _LC1_G4 & !_LC3_D11 # _LC3_D11 & TD12; -- Node name is '|apci54_io:244|~12~6' = '|apci54_io:244|IOW5' -- Equation name is '_LC7_G4', type is buried _LC7_G4 = DFF( _EQ028, GLOBAL( BCLK), VCC, VCC); _EQ028 = !_LC3_D11 & _LC7_G4 # _LC3_D11 & TD13; -- Node name is '|apci54_io:244|~12~7' = '|apci54_io:244|IOW6' -- Equation name is '_LC6_G4', type is buried _LC6_G4 = DFF( _EQ029, GLOBAL( BCLK), VCC, VCC); _EQ029 = !_LC3_D11 & _LC6_G4 # _LC3_D11 & TD14; -- Node name is '|apci54_io:244|~12~8' = '|apci54_io:244|IOW7' -- Equation name is '_LC2_G4', type is buried _LC2_G4 = DFF( _EQ030, GLOBAL( BCLK), VCC, VCC); _EQ030 = _LC2_G4 & !_LC3_D11 # _LC3_D11 & TD15; -- Node name is '|apci54_io:245|~12~1' = '|apci54_io:245|IOW0' -- Equation name is '_LC8_G4', type is buried _LC8_G4 = DFF( _EQ031, GLOBAL( BCLK), VCC, VCC); _EQ031 = !_LC1_D1 & _LC8_G4 # _LC1_D1 & TD0; -- Node name is '|apci54_io:245|~12~2' = '|apci54_io:245|IOW1' -- Equation name is '_LC6_D3', type is buried _LC6_D3 = DFF( _EQ032, GLOBAL( BCLK), VCC, VCC); _EQ032 = !_LC1_D1 & _LC6_D3 # _LC1_D1 & TD1; -- Node name is '|apci54_io:245|~12~3' = '|apci54_io:245|IOW2' -- Equation name is '_LC2_C13', type is buried _LC2_C13 = DFF( _EQ033, GLOBAL( BCLK), VCC, VCC); _EQ033 = !_LC1_D1 & _LC2_C13 # _LC1_D1 & TD2; -- Node name is '|apci54_io:245|~12~4' = '|apci54_io:245|IOW3' -- Equation name is '_LC8_C13', type is buried _LC8_C13 = DFF( _EQ034, GLOBAL( BCLK), VCC, VCC); _EQ034 = !_LC1_D1 & _LC8_C13 # _LC1_D1 & TD3; -- Node name is '|apci54_io:245|~12~5' = '|apci54_io:245|IOW4' -- Equation name is '_LC7_C13', type is buried _LC7_C13 = DFF( _EQ035, GLOBAL( BCLK), VCC, VCC); _EQ035 = !_LC1_D1 & _LC7_C13 # _LC1_D1 & TD4; -- Node name is '|apci54_io:245|~12~6' = '|apci54_io:245|IOW5' -- Equation name is '_LC1_C13', type is buried _LC1_C13 = DFF( _EQ036, GLOBAL( BCLK), VCC, VCC); _EQ036 = _LC1_C13 & !_LC1_D1 # _LC1_D1 & TD5; -- Node name is '|apci54_io:245|~12~7' = '|apci54_io:245|IOW6' -- Equation name is '_LC9_C13', type is buried _LC9_C13 = DFF( _EQ037, GLOBAL( BCLK), VCC, VCC); _EQ037 = !_LC1_D1 & _LC9_C13 # _LC1_D1 & TD6; -- Node name is '|apci54_io:245|~12~8' = '|apci54_io:245|IOW7' -- Equation name is '_LC1_D3', type is buried _LC1_D3 = DFF( _EQ038, GLOBAL( BCLK), VCC, VCC); _EQ038 = !_LC1_D1 & _LC1_D3 # _LC1_D1 & TD7; -- Node name is '|apci54_io:246|~12~1' = '|apci54_io:246|IOW0' -- Equation name is '_LC6_B16', type is buried _LC6_B16 = DFF( _EQ039, GLOBAL( BCLK), VCC, VCC); _EQ039 = !_LC3_D24 & _LC6_B16 # _LC3_D24 & TD8; -- Node name is '|apci54_io:246|~12~2' = '|apci54_io:246|IOW1' -- Equation name is '_LC7_E25', type is buried _LC7_E25 = DFF( _EQ040, GLOBAL( BCLK), VCC, VCC); _EQ040 = !_LC3_D24 & _LC7_E25 # _LC3_D24 & TD9; -- Node name is '|apci54_io:246|~12~3' = '|apci54_io:246|IOW2' -- Equation name is '_LC1_E25', type is buried _LC1_E25 = DFF( _EQ041, GLOBAL( BCLK), VCC, VCC); _EQ041 = _LC1_E25 & !_LC3_D24 # _LC3_D24 & TD10; -- Node name is '|apci54_io:246|~12~4' = '|apci54_io:246|IOW3' -- Equation name is '_LC7_E23', type is buried _LC7_E23 = DFF( _EQ042, GLOBAL( BCLK), VCC, VCC); _EQ042 = !_LC3_D24 & _LC7_E23 # _LC3_D24 & TD11; -- Node name is '|apci54_io:246|~12~5' = '|apci54_io:246|IOW4' -- Equation name is '_LC6_E25', type is buried _LC6_E25 = DFF( _EQ043, GLOBAL( BCLK), VCC, VCC); _EQ043 = !_LC3_D24 & _LC6_E25 # _LC3_D24 & TD12; -- Node name is '|apci54_io:246|~12~6' = '|apci54_io:246|IOW5' -- Equation name is '_LC1_E23', type is buried _LC1_E23 = DFF( _EQ044, GLOBAL( BCLK), VCC, VCC); _EQ044 = _LC1_E23 & !_LC3_D24 # _LC3_D24 & TD13; -- Node name is '|apci54_io:246|~12~7' = '|apci54_io:246|IOW6' -- Equation name is '_LC6_E23', type is buried _LC6_E23 = DFF( _EQ045, GLOBAL( BCLK), VCC, VCC); _EQ045 = !_LC3_D24 & _LC6_E23 # _LC3_D24 & TD14; -- Node name is '|apci54_io:246|~12~8' = '|apci54_io:246|IOW7' -- Equation name is '_LC1_B16', type is buried _LC1_B16 = DFF( _EQ046, GLOBAL( BCLK), VCC, VCC); _EQ046 = _LC1_B16 & !_LC3_D24 # _LC3_D24 & TD15; -- Node name is '|apci54_io:247|~12~1' = '|apci54_io:247|IOW0' -- Equation name is '_LC4_G4', type is buried _LC4_G4 = DFF( _EQ047, GLOBAL( BCLK), VCC, VCC); _EQ047 = _LC4_G4 & !_LC7_D1 # _LC7_D1 & TD0; -- Node name is '|apci54_io:247|~12~2' = '|apci54_io:247|IOW1' -- Equation name is '_LC9_G4', type is buried _LC9_G4 = DFF( _EQ048, GLOBAL( BCLK), VCC, VCC); _EQ048 = !_LC7_D1 & _LC9_G4 # _LC7_D1 & TD1; -- Node name is '|apci54_io:247|~12~3' = '|apci54_io:247|IOW2' -- Equation name is '_LC5_G4', type is buried _LC5_G4 = DFF( _EQ049, GLOBAL( BCLK), VCC, VCC); _EQ049 = _LC5_G4 & !_LC7_D1 # _LC7_D1 & TD2; -- Node name is '|apci54_io:247|~12~4' = '|apci54_io:247|IOW3' -- Equation name is '_LC10_G4', type is buried _LC10_G4 = DFF( _EQ050, GLOBAL( BCLK), VCC, VCC); _EQ050 = !_LC7_D1 & _LC10_G4 # _LC7_D1 & TD3; -- Node name is '|apci54_io:247|~12~5' = '|apci54_io:247|IOW4' -- Equation name is '_LC3_G4', type is buried _LC3_G4 = DFF( _EQ051, GLOBAL( BCLK), VCC, VCC); _EQ051 = _LC3_G4 & !_LC7_D1 # _LC7_D1 & TD4; -- Node name is '|apci54_io:247|~12~6' = '|apci54_io:247|IOW5' -- Equation name is '_LC6_A5', type is buried _LC6_A5 = DFF( _EQ052, GLOBAL( BCLK), VCC, VCC); _EQ052 = _LC6_A5 & !_LC7_D1 # _LC7_D1 & TD5; -- Node name is '|apci54_io:247|~12~7' = '|apci54_io:247|IOW6' -- Equation name is '_LC7_A5', type is buried _LC7_A5 = DFF( _EQ053, GLOBAL( BCLK), VCC, VCC); _EQ053 = _LC7_A5 & !_LC7_D1 # _LC7_D1 & TD6; -- Node name is '|apci54_io:247|~12~8' = '|apci54_io:247|IOW7' -- Equation name is '_LC7_D3', type is buried _LC7_D3 = DFF( _EQ054, GLOBAL( BCLK), VCC, VCC); _EQ054 = !_LC7_D1 & _LC7_D3 # _LC7_D1 & TD7; -- Node name is '|apci54_io:248|~12~1' = '|apci54_io:248|IOW0' -- Equation name is '_LC3_E23', type is buried _LC3_E23 = DFF( _EQ055, GLOBAL( BCLK), VCC, VCC); _EQ055 = !_LC2_D24 & _LC3_E23 # _LC2_D24 & TD8; -- Node name is '|apci54_io:248|~12~2' = '|apci54_io:248|IOW1' -- Equation name is '_LC3_E25', type is buried _LC3_E25 = DFF( _EQ056, GLOBAL( BCLK), VCC, VCC); _EQ056 = !_LC2_D24 & _LC3_E25 # _LC2_D24 & TD9; -- Node name is '|apci54_io:248|~12~3' = '|apci54_io:248|IOW2' -- Equation name is '_LC8_E25', type is buried _LC8_E25 = DFF( _EQ057, GLOBAL( BCLK), VCC, VCC); _EQ057 = !_LC2_D24 & _LC8_E25 # _LC2_D24 & TD10; -- Node name is '|apci54_io:248|~12~4' = '|apci54_io:248|IOW3' -- Equation name is '_LC9_E23', type is buried _LC9_E23 = DFF( _EQ058, GLOBAL( BCLK), VCC, VCC); _EQ058 = !_LC2_D24 & _LC9_E23 # _LC2_D24 & TD11; -- Node name is '|apci54_io:248|~12~5' = '|apci54_io:248|IOW4' -- Equation name is '_LC2_E25', type is buried _LC2_E25 = DFF( _EQ059, GLOBAL( BCLK), VCC, VCC); _EQ059 = !_LC2_D24 & _LC2_E25 # _LC2_D24 & TD12; -- Node name is '|apci54_io:248|~12~6' = '|apci54_io:248|IOW5' -- Equation name is '_LC2_E23', type is buried _LC2_E23 = DFF( _EQ060, GLOBAL( BCLK), VCC, VCC); _EQ060 = !_LC2_D24 & _LC2_E23 # _LC2_D24 & TD13; -- Node name is '|apci54_io:248|~12~7' = '|apci54_io:248|IOW6' -- Equation name is '_LC8_E23', type is buried _LC8_E23 = DFF( _EQ061, GLOBAL( BCLK), VCC, VCC); _EQ061 = !_LC2_D24 & _LC8_E23 # _LC2_D24 & TD14; -- Node name is '|apci54_io:248|~12~8' = '|apci54_io:248|IOW7' -- Equation name is '_LC6_F16', type is buried _LC6_F16 = DFF( _EQ062, GLOBAL( BCLK), VCC, VCC); _EQ062 = !_LC2_D24 & _LC6_F16 # _LC2_D24 & TD15; -- Node name is '|apci54_io:249|~12~1' = '|apci54_io:249|IOW0' -- Equation name is '_LC6_B6', type is buried _LC6_B6 = DFF( _EQ063, GLOBAL( BCLK), VCC, VCC); _EQ063 = _LC6_B6 & !_LC10_D1 # _LC10_D1 & TD0; -- Node name is '|apci54_io:249|~12~2' = '|apci54_io:249|IOW1' -- Equation name is '_LC7_C4', type is buried _LC7_C4 = DFF( _EQ064, GLOBAL( BCLK), VCC, VCC); _EQ064 = _LC7_C4 & !_LC10_D1 # _LC10_D1 & TD1; -- Node name is '|apci54_io:249|~12~3' = '|apci54_io:249|IOW2' -- Equation name is '_LC3_C13', type is buried _LC3_C13 = DFF( _EQ065, GLOBAL( BCLK), VCC, VCC); _EQ065 = _LC3_C13 & !_LC10_D1 # _LC10_D1 & TD2; -- Node name is '|apci54_io:249|~12~4' = '|apci54_io:249|IOW3' -- Equation name is '_LC6_C13', type is buried _LC6_C13 = DFF( _EQ066, GLOBAL( BCLK), VCC, VCC); _EQ066 = _LC6_C13 & !_LC10_D1 # _LC10_D1 & TD3; -- Node name is '|apci54_io:249|~12~5' = '|apci54_io:249|IOW4' -- Equation name is '_LC4_C13', type is buried _LC4_C13 = DFF( _EQ067, GLOBAL( BCLK), VCC, VCC); _EQ067 = _LC4_C13 & !_LC10_D1 # _LC10_D1 & TD4; -- Node name is '|apci54_io:249|~12~6' = '|apci54_io:249|IOW5' -- Equation name is '_LC10_C13', type is buried _LC10_C13 = DFF( _EQ068, GLOBAL( BCLK), VCC, VCC); _EQ068 = _LC10_C13 & !_LC10_D1 # _LC10_D1 & TD5; -- Node name is '|apci54_io:249|~12~7' = '|apci54_io:249|IOW6' -- Equation name is '_LC5_C13', type is buried _LC5_C13 = DFF( _EQ069, GLOBAL( BCLK), VCC, VCC); _EQ069 = _LC5_C13 & !_LC10_D1 # _LC10_D1 & TD6; -- Node name is '|apci54_io:249|~12~8' = '|apci54_io:249|IOW7' -- Equation name is '_LC2_D3', type is buried _LC2_D3 = DFF( _EQ070, GLOBAL( BCLK), VCC, VCC); _EQ070 = _LC2_D3 & !_LC10_D1 # _LC10_D1 & TD7; -- Node name is '|LPM_COMPARE:256|comptree:comparator|cmpchain:cmp_end|aeb_out' = '|LPM_COMPARE:256|comptree:comparator.aeb' from file "cmpchain.tdf" line 171, column 9 -- Equation name is '_LC3_B14', type is buried _LC3_B14 = LCELL( _EQ071C); _EQ071C = _EQ071 & CASCADE( _EQ072C); _EQ071 = Key4 & Key5 & !Key6 & !Key7; -- Node name is '|LPM_COMPARE:256|comptree:comparator|cmpchain:cmp_end|ecasc0' from file "cmpchain.tdf" line 178, column 17 -- Equation name is '_LC2_B14', type is buried _LC2_B14 = LCELL( _EQ072C); _EQ072C = _EQ072; _EQ072 = Key0 & !Key1 & !Key2 & !Key3; -- Node name is '|LPM_DECODE:259|lpm_compare:comparator0|comptree:comparator|cmpchain:cmp_end|aeb_out' = '|LPM_DECODE:259|lpm_compare:comparator0|comptree:comparator.aeb' from file "cmpchain.tdf" line 119, column 6 -- Equation name is '_LC10_D1', type is buried _LC10_D1 = LCELL( _EQ073); _EQ073 = !/IOW & _LC4_D1 & !TA1 & !TA2; -- Node name is '|LPM_DECODE:259|lpm_compare:comparator1|comptree:comparator|cmpchain:cmp_end|aeb_out' = '|LPM_DECODE:259|lpm_compare:comparator1|comptree:comparator.aeb' from file "cmpchain.tdf" line 119, column 6 -- Equation name is '_LC7_D1', type is buried _LC7_D1 = LCELL( _EQ074); _EQ074 = !/IOW & _LC4_D1 & TA1 & !TA2; -- Node name is '|LPM_DECODE:259|lpm_compare:comparator2|comptree:comparator|cmpchain:cmp_end|aeb_out' = '|LPM_DECODE:259|lpm_compare:comparator2|comptree:comparator.aeb' from file "cmpchain.tdf" line 119, column 6 -- Equation name is '_LC1_D1', type is buried _LC1_D1 = LCELL( _EQ075); _EQ075 = !/IOW & _LC4_D1 & !TA1 & TA2; -- Node name is '|LPM_DECODE:259|lpm_compare:comparator3|comptree:comparator|cmpchain:cmp_end|aeb_out' = '|LPM_DECODE:259|lpm_compare:comparator3|comptree:comparator.aeb' from file "cmpchain.tdf" line 119, column 6 -- Equation name is '_LC2_D1', type is buried _LC2_D1 = LCELL( _EQ076); _EQ076 = !/IOW & _LC4_D1 & TA1 & TA2; -- Node name is '|LPM_DECODE:262|lpm_compare:comparator0|comptree:comparator|cmpchain:cmp_end|aeb_out' = '|LPM_DECODE:262|lpm_compare:comparator0|comptree:comparator.aeb' from file "cmpchain.tdf" line 119, column 6 -- Equation name is '_LC2_D24', type is buried _LC2_D24 = LCELL( _EQ077); _EQ077 = _LC3_D1 & !TA1 & !TA2; -- Node name is '|LPM_DECODE:262|lpm_compare:comparator1|comptree:comparator|cmpchain:cmp_end|aeb_out' = '|LPM_DECODE:262|lpm_compare:comparator1|comptree:comparator.aeb' from file "cmpchain.tdf" line 119, column 6 -- Equation name is '_LC3_D24', type is buried _LC3_D24 = LCELL( _EQ078); _EQ078 = _LC3_D1 & TA1 & !TA2; -- Node name is '|LPM_DECODE:262|lpm_compare:comparator2|comptree:comparator|cmpchain:cmp_end|aeb_out' = '|LPM_DECODE:262|lpm_compare:comparator2|comptree:comparator.aeb' from file "cmpchain.tdf" line 119, column 6 -- Equation name is '_LC3_D11', type is buried _LC3_D11 = LCELL( _EQ079); _EQ079 = _LC3_D1 & !TA1 & TA2; -- Node name is '|LPM_DECODE:262|lpm_compare:comparator3|comptree:comparator|cmpchain:cmp_end|aeb_out' = '|LPM_DECODE:262|lpm_compare:comparator3|comptree:comparator.aeb' from file "cmpchain.tdf" line 119, column 6 -- Equation name is '_LC6_D5', type is buried _LC6_D5 = LCELL( _EQ080); _EQ080 = _LC3_D1 & TA1 & TA2; -- Node name is '|LPM_MUX:250|muxlut:150|result_node' = '|LPM_MUX:250|muxlut:150.result' from file "muxlut.tdf" line 170, column 80 -- Equation name is '_LC9_B28', type is buried _LC9_B28 = LCELL( _EQ081C); _EQ081C = _EQ081 & CASCADE( _EQ082C); _EQ081 = DIRR0 & TA1 # IOE0 & !TA1 # !TA2; -- Node name is '|LPM_MUX:250|muxlut:150|:41' from file "muxlut.tdf" line 171, column 12 -- Equation name is '_LC8_B28', type is buried _LC8_B28 = LCELL( _EQ082C); _EQ082C = _EQ082; _EQ082 = IOA0 & !TA1 # IOC0 & TA1 # TA2; -- Node name is '|LPM_MUX:250|muxlut:168|result_node' = '|LPM_MUX:250|muxlut:168.result' from file "muxlut.tdf" line 170, column 80 -- Equation name is '_LC7_C22', type is buried _LC7_C22 = LCELL( _EQ083C); _EQ083C = _EQ083 & CASCADE( _EQ084C); _EQ083 = DIRR1 & TA1 # IOE1 & !TA1 # !TA2; -- Node name is '|LPM_MUX:250|muxlut:168|:41' from file "muxlut.tdf" line 171, column 12 -- Equation name is '_LC6_C22', type is buried _LC6_C22 = LCELL( _EQ084C); _EQ084C = _EQ084; _EQ084 = IOA1 & !TA1 # IOC1 & TA1 # TA2; -- Node name is '|LPM_MUX:250|muxlut:186|result_node' = '|LPM_MUX:250|muxlut:186.result' from file "muxlut.tdf" line 170, column 80 -- Equation name is '_LC5_A15', type is buried _LC5_A15 = LCELL( _EQ085C); _EQ085C = _EQ085 & CASCADE( _EQ086C); _EQ085 = DIRR2 & TA1 # IOE2 & !TA1 # !TA2; -- Node name is '|LPM_MUX:250|muxlut:186|:41' from file "muxlut.tdf" line 171, column 12 -- Equation name is '_LC4_A15', type is buried _LC4_A15 = LCELL( _EQ086C); _EQ086C = _EQ086; _EQ086 = IOA2 & !TA1 # IOC2 & TA1 # TA2; -- Node name is '|LPM_MUX:250|muxlut:204|result_node' = '|LPM_MUX:250|muxlut:204.result' from file "muxlut.tdf" line 170, column 80 -- Equation name is '_LC7_A15', type is buried _LC7_A15 = LCELL( _EQ087C); _EQ087C = _EQ087 & CASCADE( _EQ088C); _EQ087 = DIRR3 & TA1 # IOE3 & !TA1 # !TA2; -- Node name is '|LPM_MUX:250|muxlut:204|:41' from file "muxlut.tdf" line 171, column 12 -- Equation name is '_LC6_A15', type is buried _LC6_A15 = LCELL( _EQ088C); _EQ088C = _EQ088; _EQ088 = IOA3 & !TA1 # IOC3 & TA1 # TA2; -- Node name is '|LPM_MUX:250|muxlut:222|result_node' = '|LPM_MUX:250|muxlut:222.result' from file "muxlut.tdf" line 170, column 80 -- Equation name is '_LC3_A12', type is buried _LC3_A12 = LCELL( _EQ089C); _EQ089C = _EQ089 & CASCADE( _EQ090C); _EQ089 = DIRR4 & TA1 # IOE4 & !TA1 # !TA2; -- Node name is '|LPM_MUX:250|muxlut:222|:41' from file "muxlut.tdf" line 171, column 12 -- Equation name is '_LC2_A12', type is buried _LC2_A12 = LCELL( _EQ090C); _EQ090C = _EQ090; _EQ090 = IOA4 & !TA1 # IOC4 & TA1 # TA2; -- Node name is '|LPM_MUX:250|muxlut:240|result_node' = '|LPM_MUX:250|muxlut:240.result' from file "muxlut.tdf" line 170, column 80 -- Equation name is '_LC5_A12', type is buried _LC5_A12 = LCELL( _EQ091C); _EQ091C = _EQ091 & CASCADE( _EQ092C); _EQ091 = DIRR5 & TA1 # IOE5 & !TA1 # !TA2; -- Node name is '|LPM_MUX:250|muxlut:240|:41' from file "muxlut.tdf" line 171, column 12 -- Equation name is '_LC4_A12', type is buried _LC4_A12 = LCELL( _EQ092C); _EQ092C = _EQ092; _EQ092 = IOA5 & !TA1 # IOC5 & TA1 # TA2; -- Node name is '|LPM_MUX:250|muxlut:258|result_node' = '|LPM_MUX:250|muxlut:258.result' from file "muxlut.tdf" line 170, column 80 -- Equation name is '_LC5_A5', type is buried _LC5_A5 = LCELL( _EQ093C); _EQ093C = _EQ093 & CASCADE( _EQ094C); _EQ093 = !TA2 # DIRR6 & TA1 # IOE6 & !TA1; -- Node name is '|LPM_MUX:250|muxlut:258|:41' from file "muxlut.tdf" line 171, column 12 -- Equation name is '_LC4_A5', type is buried _LC4_A5 = LCELL( _EQ094C); _EQ094C = _EQ094; _EQ094 = TA2 # IOA6 & !TA1 # IOC6 & TA1; -- Node name is '|LPM_MUX:250|muxlut:276|result_node' = '|LPM_MUX:250|muxlut:276.result' from file "muxlut.tdf" line 170, column 80 -- Equation name is '_LC3_A5', type is buried _LC3_A5 = LCELL( _EQ095C); _EQ095C = _EQ095 & CASCADE( _EQ096C); _EQ095 = !TA2 # DIRR7 & TA1 # IOE7 & !TA1; -- Node name is '|LPM_MUX:250|muxlut:276|:41' from file "muxlut.tdf" line 171, column 12 -- Equation name is '_LC2_A5', type is buried _LC2_A5 = LCELL( _EQ096C); _EQ096C = _EQ096; _EQ096 = TA2 # IOA7 & !TA1 # IOC7 & TA1; -- Node name is '|LPM_MUX:250|muxlut:294|result_node' = '|LPM_MUX:250|muxlut:294.result' from file "muxlut.tdf" line 170, column 80 -- Equation name is '_LC3_A15', type is buried _LC3_A15 = LCELL( _EQ097C); _EQ097C = _EQ097 & CASCADE( _EQ098C); _EQ097 = !TA2 # TA1 # IOF0; -- Node name is '|LPM_MUX:250|muxlut:294|:41' from file "muxlut.tdf" line 171, column 12 -- Equation name is '_LC2_A15', type is buried _LC2_A15 = LCELL( _EQ098C); _EQ098C = _EQ098; _EQ098 = TA2 # IOB0 & !TA1 # IOD0 & TA1; -- Node name is '|LPM_MUX:250|muxlut:312|result_node' = '|LPM_MUX:250|muxlut:312.result' from file "muxlut.tdf" line 170, column 80 -- Equation name is '_LC3_B28', type is buried _LC3_B28 = LCELL( _EQ099C); _EQ099C = _EQ099 & CASCADE( _EQ100C); _EQ099 = !TA2 # IOF1 & !TA1; -- Node name is '|LPM_MUX:250|muxlut:312|:41' from file "muxlut.tdf" line 171, column 12 -- Equation name is '_LC2_B28', type is buried _LC2_B28 = LCELL( _EQ100C); _EQ100C = _EQ100; _EQ100 = TA2 # IOB1 & !TA1 # IOD1 & TA1; -- Node name is '|LPM_MUX:250|muxlut:330|result_node' = '|LPM_MUX:250|muxlut:330.result' from file "muxlut.tdf" line 170, column 80 -- Equation name is '_LC5_B28', type is buried _LC5_B28 = LCELL( _EQ101C); _EQ101C = _EQ101 & CASCADE( _EQ102C); _EQ101 = !TA2 # IOF2 & !TA1; -- Node name is '|LPM_MUX:250|muxlut:330|:41' from file "muxlut.tdf" line 171, column 12 -- Equation name is '_LC4_B28', type is buried _LC4_B28 = LCELL( _EQ102C); _EQ102C = _EQ102; _EQ102 = TA2 # IOB2 & !TA1 # IOD2 & TA1; -- Node name is '|LPM_MUX:250|muxlut:348|result_node' = '|LPM_MUX:250|muxlut:348.result' from file "muxlut.tdf" line 170, column 80 -- Equation name is '_LC3_B3', type is buried _LC3_B3 = LCELL( _EQ103C); _EQ103C = _EQ103 & CASCADE( _EQ104C); _EQ103 = !TA2 # IOF3 & !TA1; -- Node name is '|LPM_MUX:250|muxlut:348|:41' from file "muxlut.tdf" line 171, column 12 -- Equation name is '_LC2_B3', type is buried _LC2_B3 = LCELL( _EQ104C); _EQ104C = _EQ104; _EQ104 = TA2 # IOB3 & !TA1 # IOD3 & TA1; -- Node name is '|LPM_MUX:250|muxlut:366|result_node' = '|LPM_MUX:250|muxlut:366.result' from file "muxlut.tdf" line 170, column 80 -- Equation name is '_LC7_B28', type is buried _LC7_B28 = LCELL( _EQ105C); _EQ105C = _EQ105 & CASCADE( _EQ106C); _EQ105 = !TA2 # TA1 # IOF4; -- Node name is '|LPM_MUX:250|muxlut:366|:41' from file "muxlut.tdf" line 171, column 12 -- Equation name is '_LC6_B28', type is buried _LC6_B28 = LCELL( _EQ106C); _EQ106C = _EQ106; _EQ106 = IOB4 & !TA1 # IOD4 & TA1 # TA2; -- Node name is '|LPM_MUX:250|muxlut:384|result_node' = '|LPM_MUX:250|muxlut:384.result' from file "muxlut.tdf" line 170, column 80 -- Equation name is '_LC3_C9', type is buried _LC3_C9 = LCELL( _EQ107C); _EQ107C = _EQ107 & CASCADE( _EQ108C); _EQ107 = !TA2 # TA1 # IOF5; -- Node name is '|LPM_MUX:250|muxlut:384|:41' from file "muxlut.tdf" line 171, column 12 -- Equation name is '_LC2_C9', type is buried _LC2_C9 = LCELL( _EQ108C); _EQ108C = _EQ108; _EQ108 = TA2 # IOB5 & !TA1 # IOD5 & TA1; -- Node name is '|LPM_MUX:250|muxlut:402|result_node' = '|LPM_MUX:250|muxlut:402.result' from file "muxlut.tdf" line 170, column 80 -- Equation name is '_LC3_C22', type is buried _LC3_C22 = LCELL( _EQ109C); _EQ109C = _EQ109 & CASCADE( _EQ110C); _EQ109 = !TA2 # IOF6 & !TA1; -- Node name is '|LPM_MUX:250|muxlut:402|:41' from file "muxlut.tdf" line 171, column 12 -- Equation name is '_LC2_C22', type is buried _LC2_C22 = LCELL( _EQ110C); _EQ110C = _EQ110; _EQ110 = TA2 # IOB6 & !TA1 # IOD6 & TA1; -- Node name is '|LPM_MUX:250|muxlut:420|result_node' = '|LPM_MUX:250|muxlut:420.result' from file "muxlut.tdf" line 170, column 80 -- Equation name is '_LC5_C22', type is buried _LC5_C22 = LCELL( _EQ111C); _EQ111C = _EQ111 & CASCADE( _EQ112C); _EQ111 = !TA2 # IOF7 & !TA1; -- Node name is '|LPM_MUX:250|muxlut:420|:41' from file "muxlut.tdf" line 171, column 12 -- Equation name is '_LC4_C22', type is buried _LC4_C22 = LCELL( _EQ112C); _EQ112C = _EQ112; _EQ112 = TA2 # IOB7 & !TA1 # IOD7 & TA1; -- Node name is '/IOCS2~fit~out' -- Equation name is '/IOCS2~fit~out', location is LC2_A23, type is buried. -- synthesized logic cell _LC2_A23 = LCELL( /IOCS2); -- Node name is '/IORREQ' -- Equation name is '/IORREQ', type is output /IORREQ = VCC; -- Node name is '|BNAND5:263|~1~1' = '/TCS~1' -- Equation name is '_LC5_D1', location is LC5_D1, type is buried. -- synthesized logic cell _LC5_D1 = LCELL( _EQ113); _EQ113 = !TA3 & !TA4 & !TA5 & !TA6; -- Node name is '~264~1' -- Equation name is '~264~1', location is LC4_D1, type is buried. -- synthesized logic cell _LC4_D1 = LCELL( _EQ114); _EQ114 = _LC5_D1 & !TA0 & !TA7; -- Node name is ':265' -- Equation name is '_LC3_D1', type is buried _LC3_D1 = LCELL( _EQ115); _EQ115 = !/BHE & !/IOW & _LC5_D1 & !TA7; Project Information c:\max2work\kumagai\univ_if\uiftest\uif_apci54.rpt ** COMPILATION SETTINGS & TIMES ** Processing Menu Commands ------------------------ Design Doctor = off Logic Synthesis: Synthesis Type Used = Multi-Level Default Synthesis Style = FAST Logic option settings in 'FAST' style for 'FLEX6000' family CARRY_CHAIN = auto CARRY_CHAIN_LENGTH = 32 CASCADE_CHAIN = auto CASCADE_CHAIN_LENGTH = 2 DECOMPOSE_GATES = on DUPLICATE_LOGIC_EXTRACTION = on MINIMIZATION = full MULTI_LEVEL_FACTORING = on NOT_GATE_PUSH_BACK = on REDUCE_LOGIC = on REFACTORIZATION = off REGISTER_OPTIMIZATION = on RESYNTHESIZE_NETWORK = on SLOW_SLEW_RATE = off SUBFACTOR_EXTRACTION = off IGNORE_SOFT_BUFFERS = on USE_LPM_FOR_AHDL_OPERATORS = off Other logic synthesis settings: Automatic Global Clock = on Automatic Global Clear = on Automatic Global Preset = on Automatic Global Output Enable = on Automatic Fast I/O = off Automatic Register Packing = off Automatic Open-Drain Pins = on Automatic Implement in EAB = off Optimize = 10 Default Timing Specifications: None Cut All Bidir Feedback Timing Paths = on Cut All Clear & Preset Timing Paths = on Ignore Timing Assignments = on Functional SNF Extractor = off Linked SNF Extractor = off Timing SNF Extractor = on Optimize Timing SNF = off Generate AHDL TDO File = off Fitter Settings = NORMAL Smart Recompile = off Total Recompile = off Interfaces Menu Commands ------------------------ EDIF Netlist Writer = off Verilog Netlist Writer = off VHDL Netlist Writer = off Compilation Times ----------------- Compiler Netlist Extractor 00:00:00 Database Builder 00:00:02 Logic Synthesizer 00:00:00 Partitioner 00:00:01 Fitter 00:00:14 Timing SNF Extractor 00:00:01 Assembler 00:00:03 -------------------------- -------- Total Time 00:00:21 Memory Allocated ----------------- Peak memory allocated during compilation = 21,037K